N. Dhanwada et al, "Hierarchical Constraint Transformation using Directed Interval Search for Analog System Synthesis", Proc. of the Design, Automation and Test in Europe Conference, 1999, pp. 328-335. Home/Search Document Details and Download
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A Functional Specification Notation for Co-Design of Mixed.. - Doboli, al. (2002) (Correct)
....large. Finally, we considered Architecture 1 for the second block of Stage 2 as it was the only one with a small output error. The next step was circuit synthesis. Op amp constraint for gain, dominant pole, input and output impedance (found during PO) were input to a circuit synthesis tool [5] that sized op amp transistors. SPICE files for synthesized op amps were used to complete the filter description at the transistor level. Each of the SPICE models was simulated and resulting plots for Stage 1 are shown in Figure 10. Similar plots were obtained for Stage 2. Simulation results show ....
N. Dhanwada et al, "Hierarchical Constraint Transformation using Directed Interval Search for Analog System Synthesis", Proc. of DATE, 1999.
Formal Verification of Synthesized Analog Designs - Ghosh, Vemuri Self-citation (Vemuri) (Correct)
....VASE [6] is an analog synthesis system, which takes a behavioral specification in VHDL AMS as input [13] and comes up with an analog circuit consisting of components from a characterized library [15] satisfying the performance constraints. It goes through many optimization and estimation steps [16] to achieve the performance goals. The analog circuit thus produced is then traditionally simulated to verify the functional correctness. Translator VASE Proof Script Translator Yes No Behavioral Specification in VHDL AMS Sized Hierarchical Net List in Spice PVS Spice to PVS VHDL AMS ....
N. Dhanwada, A. Nunez-Aldana, and R. Vemuri. "Hierarchical Constraint Transformation using Directed Interval Search for Analog System Synthesis". Proceedings of Design Automation and Test in Europe, March 1999.
A VHDL-AMS Compiler and Architecture Generator for.. - Alex Doboli Ranga (1999) Self-citation (Vemuri) (Correct)
....to an op amp level net list of library circuits [7] We designed a branch and bound [9] based mapping algorithm, that looks for the net list, that satisfies all imposed performance constraints, and minimizes the overall ASIC area. The algorithm uses Analog Performance Estimation Tools [17] [4] for ranking the visited solutions with respect to their performance attributes. As our experience showed, having a technology independent (compiling) and a technology dependent (mapping) step exposes the entire design to more optimization opportunities. Figure 1 outlines the overall ....
....at the op amp level, component selection picks from a component library [7] real circuit topologies for the op amps, and finally, transistor sizing decides the physical dimensions for all transistors of a design. The three synthesis tasks are guided by Analog Performance Estimation Tools [17] [4] that compute approximate values for performance measures of a system. By combining our existing performance estimation tools with the design space exploration algorithms discussed in this paper, a complete environment for automated, behavioralsynthesis of systems was obtained. The ....
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N.R. Dhanwada, A. Nunez, R. Vemuri. Hierarchical Constraint Transformation using Directed Interval Search for Analog System Synthesis. Proc. of DATE, 1999.
Behavioral Synthesis of Analog Systems using.. - Doboli.. (1999) (2 citations) Self-citation (Dhanwada Nunez Vemuri) (Correct)
.... the system level table of an opamp in a cascaded system of opamps, would give information about how the performance parameters of the opamp (power, UGF, etc) affect the overall system performance (area, power, band width etc) The tables are organized based on the concept of directed intervals [7]. Each entry consists of a system performance interval, component performance interval, and a direction attribute that gives the way in which the system performance changes with the component performance increasing in it s range. The tables are dynamically created by calling a Characterization ....
....constraints generated by the constraint transformation GA. The cost function and DIOs are the same as the one used in the constraint transformation GA, but for component performance values being used instead of system performances. However, it uses static component characterization tables [7], that are produced only once for each component. The specific solution representation used by the component synthesis GA is depicted in Figure 7. This has two parts, the first representing the component design parameter values, and the second topology information. Each value in the topology ....
N.R. Dhanwada, A. Nunez, R. Vemuri, "Hierarchical Constraint Transformation using Directed Interval Search for Analog Synthesis" , Proceedings of DATE'99, pp.328-335, 1999.
Behavioral Modeling for High-Level Synthesis of Analog and.. - Doboli, Vemuri (2002) (Correct)
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N. Dhanwada et al, "Hierarchical Constraint Transformation using Directed Interval Search for Analog System Synthesis", Proc. of the Design, Automation and Test in Europe Conference, 1999, pp. 328-335.
Exploration-based High-Level Synthesis of Linear Analog.. - Doboli, Vemuri (2002) (Correct)
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N.R. Dhanwada et al, "Hierarchical Constraint Transformation using Directed Interval Search for Analog System Synthesis", Proc. of Design, Automation and Test in Europe Conference, 1999, pp. 328-335.
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