I. Hong, M. M. Potkonjak, "Power Optimization Using Divide-andConquer Techniques for Minimization of the Number of Operations ", IEEE/ACM International Conference on Computer-Aided Design, ICCAD-97, 1997, pp. 108-113.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....load helps to decrease the impact of this term. Decreasing the second term, NSW , the average number of circuit state switches, is achieved using techniques like minimizing the Hamming distance in operations instructions following each other [13] or minimizing the number of operations [14]. This term is targeted especially by the hardware software codesign community [15] Since the supply voltage VDD contributes a quadratic term to power dissipation, it is being aggressively targeted at the device level. As technology advances towards deep submicron devices, the shrinking of the ....

I. Hong, M. M. Potkonjak, "Power Optimization Using Divide-andConquer Techniques for Minimization of the Number of Operations ", IEEE/ACM International Conference on Computer-Aided Design, ICCAD-97, 1997, pp. 108-113.

.... Several researchers have addressed the issue of power in event driven systems, and proposed various techniques for shutting down the system or parts of the system [25, 12, 4] Compilation techniques for low power software have emerged for both general purpose computation [28] and DSP computations [11]. Numerous behavioral synthesis research efforts have also addressed power minimization [23] Four research groups have addressed the use of multiple (in their software implementation restricted to two or three) different voltages [2, 13, 18, 24] They used the term variable voltage for a fixed ....

I. Hong, M. Potonjak, and R. Karri. Power optimization using divide-and-conquer techniques for minimization of the number of operations. In IEEE/ACM International Conference on Computer-Aided Design, pages 108--113, 1997.

....This information is acquired by either extensive power measurements or by simulating a CHAPTER 5 76 hardware model of the processor. Estimations can be carried out with different levels of accuracy: using only software code length and assuming an average power consumption for all instructions [Hon97] [Rus98] or more accurate, considering classes of instruction and instruction sequences [Lee97] or even using hardware models of the processor and a hardware simulator to obtain the power consumption for sequences of instructions. Different estimation methods can be chosen, depending on the ....

Hong, I.; Potonjak, M.; Karri, R., "Power Optimization Using Divide-and-Conquer Techniques for Minimization of the Number of Operations," Digest of Technical Papers of IEEE/ACM International Conference on Computer-Aided Design 1997, pp 108-113.

....units, etc. to meet low power design goals under area constraints. 1 Introduction Traditionally, low power design and synthesis of application specific programmable processors has been done in the context of a given number of operations required to complete a task. Recently, Hong and Potkonjak [14] presented a low power synthesis approach based on the minimization of the number of operations. Advances in compiler technology for instruction level parallelism (ILP) have significantly increased the ability of a microprocessor to exploit the opportunities for parallel execution that exist in ....

I. Hong and M. M. Potkonjak. Power optimization using divide-and-conquer techniques for minimization of the number of operations. In ICCAD-97 IEEE/ACM International Conference on Computer-Aided Design, 1997.

....2 and 3 present the results of our technique for minimizing power on single processor for various technologies. Our method results in power reduction by an average factor of 3.43. Due to space limitation, the experimental results for multi processors were omitted. For the results, we refer to [3]. Our method achieves cost effective solutions with very low power penalty compared to the solutions which only optimize power without considering hardware cost. Design V init V t New Volt Pow Red APCM receiver 5.0 1.1 3.85 2.62 3.3 0.7 2.53 2.64 1.3 0.3 1.01 2.58 0.5 0.1 0.38 2.68 0.25 0.06 ....

I. Hong, M. Potkonjak, and R. Karri. Power optimization using divide-and-conquer techniques for minimization of the number of operations. Technical report, Computer Science Department, UCLA, 1997.

....units, etc. to meet low power design goals under area constraints. 1 Introduction Traditionally, low power design and synthesis of application specific programmable processors has been done in the context of a given number of operations required to complete a task. Recently, Hong and Potkonjak [14] presented a low power synthesis approach based on the minimization of the number of operations. Advances in compiler technology for instruction level parallelism (ILP) have significantly increased the ability of a microprocessor to exploit the opportunities for parallel execution that exist in ....

I. Hong and M. M. Potkonjak. Power optimization using divide-and-conquer techniques for minimization of the number of operations. In ICCAD-97 IEEE/ACM International Conference on Computer-Aided Design, 1997.

.... programmable processor in a wireless X terminal [22] 46] and disk shutdown [11] At an implementation level, circuit techniques for low power hardware have been proposed [6] Compilation techniques for low power software have emerged for both general purpose computation [50] and DSP computations [21]. Numerous behavioral synthesis research efforts have also addressed power minimization; for example, see the survey of [43] Four research groups in particular have addressed the use of multiple (in their software implementation, restricted to two or three) different voltages for behavioral ....

I. Hong, M. Potkonjak, and R. Karri, "Power optimization using divide-and-conquer techniques for minimization of the number of operations, " in Proc. IEEE/ACM Int. Conf. Computer-Aided Design, 1997, pp. 108--113.

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