Gupta, A., and Fisher, A. L. Parametric circuit representation using inductive boolean functions. In Computer Aided Verification (1993), C. Courcoubetis, Ed., vol. 697 of Lecture Notes in Computer Science, Springer-Verlag, pp. 15--28.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....as it speeds up one of the basic operations on BDDs, the restriction operation. We presented three classes of infinite functions which can be represented by extensions of BDDs. So far, the only extension that allowed the representation of infinite function was presented by Gupta and Fisher in [11] to allow inductive reasoning in circuit representation. Their extension corresponds to the first class (open functions) but without the uniqueness of the representation, because the loops have a name, which is arbitrary (and so there is no guarantee that the same loop encountered twice will be ....

....over regular functions. These functions are closed by boolean operations, but we did not find a satisfactory unique representation with a decision tree yet. We believe the first two classes will already be quite useful. For example the first class (open function) is already an improvement over [11], and the second class ( deterministic) can express many useful properties of temporal logic [15] This work is a step towards model checking and static analysis of the behavior of infinite systems, where properties depending on fairness can be expressed and manipulated efficiently using BDGs. ....

Gupta, A., and Fisher, A. L. Parametric circuit representation using inductive boolean functions. In Computer Aided Verification (1993), C. Courcoubetis, Ed., vol. 697 of Lecture Notes in Computer Science, Springer-Verlag, pp. 15--28.

....of parametric reasoning is in establishing properties of sequential circuits where time is the parameter considered. In this paper we present a new approach to formalizing parametric descriptions and reasoning about them. The starting point for our research is the work of Gupta and Fisher [8,9]. They developed a formalism for describing circuit families using one of two kinds of inductively de ned Boolean functions. The rst, called Linearly Inductive Boolean Functions, or LIFs, formalizes families of linearly structured circuits. The second, called Exponentially Inductive Boolean ....

.... of the word, i.e. e(b 1 ; b 2 ) and to the values of the EIF 0 s g and h of the right half of the word, i.e. g(b 2 n 1 1 ; b 2 n) and h(b 2 n 1 1 ; b 2 n ) The restrictions of the n instance function of an EIF 0 stems from the data structure proposed for EIF 0 s in [8,9] in order to have a canonical representation. EIF 0 s are strictly less expressive than EIFs; the reason for this is similar to why deterministic top down tree automata are weaker than nondeterministic top down tree automata. As an example, consider the function F : B , where F (x) 1 i x = ....

A. Gupta and A. Fisher. Parametric circuit representation using inductive boolean functions. In C. Courcoubetis, editor, Computer Aided Veri cation, CAV'93, volume 697 of Lecture Notes in Computer Science, pages 15-28, 1993. 24

....in Computer Science, Centre of the Danish National Research Foundation. outputs at each position, then the language that is the union of all these languages for n = 1; 2; can be recognized by a finite automaton and is thus a regular language. Recently, other groups of researchers, e.g. [8, 16], have presented methods that exploit this kind of regularity. In [16] parameterized circuits are not described as such. Instead, the automaton model is inferred by observing the behavior of circuits for n = 1; 2 : until some technical conditions indicate a fixed point. Alternatively [8, 9] ....

....[8, 16] have presented methods that exploit this kind of regularity. In [16] parameterized circuits are not described as such. Instead, the automaton model is inferred by observing the behavior of circuits for n = 1; 2 : until some technical conditions indicate a fixed point. Alternatively [8, 9] identify classes of parameterized circuits that can be described by recursive BDD tree structures which, for certain classes, correspond to finite automata. While these techniques are novel and can be very effective, they have their drawbacks. In particular, circuits must be encoded directly as ....

A. Gupta and Allen L. Fisher. Parametric circuit representation using inductive boolean functions. In C. Courcoubetis, editor, Computer Aided Verification, CAV' 93, LNCS 697, pages 15--26. Springer

....with regular communication topology. We illustrate our method by establishing safety and liveness properties for a non trivial version of the Dining Philosophers problem as proposed in [4] by Kurshan and MacMillan. Comparisons to other work. Parameterized circuits are described using BDDs in [3]. This method relies on formulating inductive steps as finite state devices and does not provide a single specification language. The work in [5] is closer in spirit to our method in that languages of finite strings are used although not as part of a logical framework. In [1] another approach is ....

A. Gupta and A.L. Fisher. Parametric circuit representation using inductive boolean functions. In Computer Aided Verification, CAV '93, LNCS 697, pages 15--28, 1993.

....how BDDs can be used to overcome an otherwise inherent problem of exponential explosion. Our minimization algorithm works very fast in practice thanks to a simple generalization of the unary apply operation of BDDs. Comparisons to other work. Parameterized circuits are described using BDDs in [8]. This method relies on formulating inductive steps as finite state devices and does not provide a single specification language. The work in [14] is closer in spirit to our method in that languages of finite strings are used although not as part of a logical framework. In [2] another approach is ....

A. Gupta and A.L. Fisher. Parametric circuit representation using inductive boolean functions. In Computer Aided Verification, CAV '93, LNCS 697, pages 15--28, 1993.

....were apparently the first to use BDD represented automata as a mechanism for representing regular languages over large alphabets. Their automaton concept is slightly different from ours since it was introduced as a representation for linear inductive functions, a notation for regular languages. In [11], their approach is generalized to tree languages and to problems beyond the regular sets. Automata on large alphabets are also implicit in work on the relationship between p adic numbers and circuits [33] Work at the University of Kiel [27] led to an implementation of a decision procedure for ....

A. Gupta and A.L. Fisher. Parametric circuit representation using inductive boolean functions. In Computer Aided Verification, CAV '93, LNCS 697, pages 15--28, 1993.

....of parametric reasoning is in establishing properties of sequential circuits where time is the parameter considered. In this paper we present a new approach to formalizing parametric descriptions and reasoning about them. The starting point for our research is the work of Gupta and Fisher [8,9]. They developed a formalism for describing circuit families using one of two kinds of inductively de ned Boolean functions. The rst, called Linearly Inductive Boolean Functions, or LIFs, formalizes families of linearly structured circuits. The second, called Exponentially Inductive Boolean ....

.... word, i.e. e(b 1 ; b 2 n 1 ) and to the values of the EIF 0 s g and h of the right half of the word, i.e. g(b 2 n 1 1 ; b 2 n) and h(b 2 n 1 1 ; b 2 n ) The restrictions of the n instance function of an EIF 0 stems from the data structure proposed for EIF 0 s in [8,9] in order to have a canonical representation. EIF 0 s are strictly less expressive than EIFs; the reason for this is similar to why deterministic top down tree automata are weaker than nondeterministic top down tree automata. As an example, consider the function F : B 2 B , where F (x) 1 ....

A. Gupta and A. Fisher. Parametric circuit representation using inductive boolean functions. In Computer Aided Verication, CAV'93, volume 697 of LNCS, pages 15-28, 1993. 24

....that has the needed properties to de ne a decidable extension of WS1S. As applications, we have shown how this extension can be used to solve certain decision problems and how it can be applied to reason automatically about parameterized families of combinational tree structured circuits. In [15, 14, 2, 18] exponentially inductive functions (EIFs) were used to describe parameterized families of combinational tree structured circuits. It is possible to represent EIFs in WS1S since in [2, 18] it was shown that they are equivalent to alternating tree automata restricted on complete leaf labeled ....

A. Gupta and A. Fisher. Parametric circuit representation using inductive boolean functions. In 5th International Conference on Computer-Aided Veri- cation, CAV'93, volume 697 of LNCS, pages 15-28, 1993.

....of parametric reasoning is in establishing properties of sequential circuits, where time is the parameter considered. In this paper we present a new approach to formalizing parametric descriptions and reasoning about them. The starting point for our research is the work of Gupta and Fisher [8,9]. They developed a formalism for describing circuit families using one of two kinds of inductively de ned Boolean functions. The rst, called Linearly Inductive Boolean Functions, or LIFs, formalizes families of linearly structured circuits. The second, called Exponentially Inductive Boolean ....

.... word, i.e. e(b 1 ; b 2 n 1 ) and to the values of the EIF 0 s g and h of the right half of the word, i.e. g(b 2 n 1 1 ; b 2 n) and h(b 2 n 1 1 ; b 2 n ) The restrictions of the n instance function of an EIF 0 stems from the data structure proposed for EIF 0 s in [8,9] in order to have a canonical representation. EIF 0 s are strictly less expressive than EIFs; the reason for this is similar to why deterministic top down tree automata are weaker than nondeterministic top down tree automata. As an example, consider the function F : B 2 B , where F (x) 1 ....

[Article contains additional citation context not shown here]

A. Gupta and A. Fisher. Parametric circuit representation using inductive boolean functions. In CAV 93, volume 697 of LNCS, pages 15-28. SpringerVerlag, 1993.

....user guidance and a successful inductive proof is automatically generated. 7 Related Work There has been considerable interest in verifying properties of hardware circuits at the input output level. Many papers on this topic have appeared in conference proceedings and journals[19] to cite a few [7, 9, 12, 17, 21, 10, 16, 34]. Different approaches have been proposed in the literature, notably among them state based approaches and the use of model checkers [9, 7] induction based approaches adapted from software verification [17, 18] and approaches based on modeling hardware circuits using higher order logics [10, 21] ....

....are well suited for verifying non parametric circuits. 5 In contrast, our approach establishes correctness of parameterized circuits for all word sizes (2 k ; k 0) An interesting approach to extend BDDs to reason about parametric circuits using a restricted form of induction is disussed in [16]. Classes of inductive boolean functions are identified which can be specified parametrically in terms of the variables used for induction. Verification is then done by automatic symbolic manipulation of these inductive boolean functions. In [4] monadic second order theory of strings has been ....

A. Gupta and A.L. Fisher, "Parametric circuit representation using inductive boolean functions", In Proc. of Computer aided verification, C. Courcoubetis (editor) LNCS 697, Springer-verlag, 1993.

....(in particular as far as housekeeping and gathering statistical information is concerned) to the specific needs of the UMC system. A thorough understanding of the details of the representation might become even more important in the future when different data structures (e.g. inductive BDDs ( GF 93] might supplement OBDDs. ....

A. Gupta, A. L. Fisher, Parametric Circuit Representation Using Inductive Boolean Functions, in Proceedings of the Conference on Computer Aided Verification 1993, Springer LNCS 697.

....an n bit adder as words of length n over an alphabet describing inputs and outputs at each position, then the language that is the union of all these languages for n = 1; 2; can be recognized by a finite automaton and is thus a regular language. Recently, other groups of researchers, e.g. [8, 16], have presented methods that exploit this kind of regularity. In [16] parameterized circuits are not described as such. Instead, the automaton model is inferred by observing the behavior of circuits for n = 1; 2 : until some technical conditions indicate a fixed point. Alternatively [8, 9] ....

....[8, 16] have presented methods that exploit this kind of regularity. In [16] parameterized circuits are not described as such. Instead, the automaton model is inferred by observing the behavior of circuits for n = 1; 2 : until some technical conditions indicate a fixed point. Alternatively [8, 9] identify classes of parameterized circuits that can be described by recursive BDD tree structures which, for certain classes, correspond to finite automata. While these techniques are novel and can be very effective, they have their drawbacks. In particular, circuits must be encoded directly as ....

A. Gupta and Allen L. Fisher. Parametric circuit representation using inductive boolean functions. In C. Courcoubetis, editor, Computer Aided Verification, CAV' 93, LNCS 697, pages 15--26. Springer Verlag, 1993.

....have been investigated in the literature. On one hand, one can try to eliminate the parameterization altogether without the use of induction [EN95] on the other hand, methods for eliminating induction in certain cases have been proposed by either choosing a canonical parameterized representation [GF93] or by reducing the parameterized checking problem to a few finite model checking problems of fixed size [KM89, McM92, MCB89] Common to these approaches to reducing parameterized systems is their linear structure, i.e. the constant difference (by some measure) of the structures of successive ....

A. Gupta and A. L. Fisher. Parametric circuit representation using inductive boolean functions. In Proceedings of the 5th Conference on Computer Aided Verification. LNCS 697, 1993.

....of parametric reasoning is in establishing properties of sequential circuits, where time is the parameter considered. In this paper we present a new approach to these problems based on alternating automata on words and trees. The starting point for our research is the work of Gupta and Fisher [6, 7]. They developed a formalism for describing circuit families using one of two kinds of inductively de ned Boolean functions. The rst, called Linearly Inductive Boolean Functions, or LIFs, formalizes families of linearly structured circuits. The second, called Exponentially Inductive Boolean ....

....: B 2 B with F (w) 1 i w = 0000 or w = 1100 or w = 1011. The reason is similar to why deterministic top down tree automata are weaker than nondeterministic top down tree automata; the restrictions of the n instance function of an EIF 0 stems from the data structure proposed for EIF 0 s in [6, 7] in order to have a canonical representation. On the other hand, it is easy to see that F is EIFrepresentable. Our results on the complexity of the equality problem for EIFs are, to our knowledge, the rst such results given in the literature. Neither we nor Gupta and Fisher have implemented a ....

[Article contains additional citation context not shown here]

A. Gupta and A. Fisher. Parametric circuit representation using inductive boolean functions. In CAV 93, volume 697 of LNCS, pages 15-28, 1993.

....version of the Dining Philosophers problem that was parameterized by the number of processes. These ideas have been further extended [27] and similar ideas have been developed in other settings, cf. 32] 8.4. Linearly Inductive Functions The work closest to ours is that of Gupta and Fisher [13, 14] who, from a rather different starting point, have also developed a BDD based formalism closely connected to regular languages. They define two classes of inductively defined Boolean functions: Linearly Inductive Functions (LIFs) and Exponentially Inductive Functions (EIFs) Both classes consist ....

Aarti Gupta and Allan L. Fisher. Parametric circuit representation using inductive boolean functions. In C. Courcoubetis, editor, Computer Aided Verification, CAV' 93, LNCS 697, pages 15--26. Springer Verlag, 1993.

.... and addressed bilateral interconnections and circular arrangements of cells [RhSo93] Furthermore, motived by the advantages of both reasoning by induction and symbolic tautology checking, Gupta and Fisher presented a novel method to verify parameterized circuits by combining the two techniques [GuFi93a, GuFi93b]. The approach is based on automatic symbolic manipulation of classes of inductive Boolean functions (IBF) Two kinds of IBF have been proposed, one being linearly inductive function (LIFs) and the other being exponentially inductive functions (EIFs) But, to examine other interesting inductive ....

A.Gupta and A.L.Fisher, "Parametric Circuit Representation Using Inductive Boolean Functions", Proc. of CAV'93, 1993, pp.15-28

....to overcome an otherwise inherent problem of exponential explosion. Our minimization algorithm works very fast in practice thanks to a simple generalization of the unary apply operation of BDDs. 4 Henriksen et al. 1. 3 Comparisons to other work Parameterized circuits are described using BDDs in [GF93]. This method relies on formulating inductive steps as nite state devices and does not provide a single speci cation language. The work in [RS93] is closer in spirit to our method in that languages of nite strings are used although not as part of a logical framework. In [BSV93] another approach ....

A. Gupta and A.L. Fisher. Parametric circuit representation using inductive boolean functions. In Computer Aided Veriøcation, CAV '93, LNCS 697, pages 1528, 1993.

....over state minimal deterministic representations of the corresponding regular languages. It is successful whenever it stabilizes up to isomorphism. As no characteristic criterion for stabilization is given, the precise class of circuits that can be handled is unclear. ffl Gupta and Fisher [GuFi93] introduce a canonical representation for inductive boolean functions (IBF) which resembles an inductive extension of BDDs covering certain classes of inductively defined hardware circuits. Verification is carried out by symbolic tautology checking on the IBF representation of the circuits. Their ....

A. Gupta, A. Fisher: "Parametric Circuit Representation Using Inductive Boolean Functions," Proc. CAV'93, Elounda (GR), June 1993, LNCS N. 697, pp.15-28.

....version of the Dining Philosophers problem that was parameterized by the number of processes. These ideas have been further extended [26] and similar ideas have been developed in other settings, cf. 31] 9. 4 Linearly Inductive Functions The work closest to ours is that of Gupta and Fisher [12, 13] who, from a rather different starting point, have also developed a BDD based formalism closely connected to regular languages. They define two classes of inductively defined Boolean functions: Linearly Inductive Functions (LIFs) and Exponentially Inductive Functions (EIFs) Both classes consist ....

Aarti Gupta and Allen L. Fisher. Parametric circuit representation using inductive boolean functions. In C. Courcoubetis, editor, Computer Aided Verification, CAV' 93, LNCS 697, pages 15--26. Springer Verlag, 1993.

....with more powerful proof theoretic frameworks. In order to fully realize this potential in practice, we have explored additional parametric circuit representation mechanisms, which allow us to represent common practical circuits as LIFs. These mechanisms have been described in detail elsewhere [11], along with examples that include serial adders, decoders, register files etc. In the same paper, we also describe a verification example for checking the mutual exclusion property of decoder outputs. This aspect of ourwork is related to recent efforts byRhoand Somenzi on unilateral iterative ....

A. Gupta and A. L. Fisher. Parametric circuit representation using inductive Boolean functions. In Proceedings of the Conference on Computer-Aided Verification, June 1993.

....views and conclusions contained in this document are those of the author and should not be interpreted as representing the official policies, either expressed or implied, of the U.S. government. canonical representation and automatic symbolic manipulation of classes of inductive Boolean functions [7, 8]. One such class, similar to unilateral iterative arrays [11] is called Linearly Inductive Functions (LIFs) It is useful in capturing induction both in parametric hardware (regular in structure) and in finite state sequential systems (regular in time) In the latter case, our LIF representation ....

....the reversal is done using standard automata techniques [15] However, our LIF representation for a sequential function 1 is significantly different from a classic DFA. First, it forms part of a more general parametric representation for multi dimensional linearly inductive Boolean functions [7]. Second, our technique for obtaining an LIF representation differs greatly from other symbolic, as well as non symbolic, automata techniques [8] The interesting aspect of this research is that a reverse DFA can be exponentially more compact than the forward DFA in some cases. Though this fact is ....

[Article contains additional citation context not shown here]

A. Gupta and A. L. Fisher. Parametric circuit representation using inductive Boolean functions. In Proceedings of the Conference on Computer-Aided Verification, volume 697 of LNCS, pages 15--28. Springer-Verlag, June 1993.

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