Mispredicted path cache effects (1999) [5 citations — 0 self]
Abstract:
Abstract. As superscalar pipelines become wider and deeper, the percentage of dynamic instructions fetched into the machine from the mispredicted path significantly increases. This paper discusses how a new cycle-accurate performance simulator is used to accurately measure mispredicted path effects on the cache hierarchy. Previously published results based on less accurate tools indicated that mispredicted path instructions have the serendipitous positive effect of doing memory prefetching. Our results show that while such prefetching does occur for some benchmarks, it does not occur consistently for all benchmarks. Furthermore the IPC impact varies widely among the benchmarks. SPECint95 benchmarks show IPC changes ranging from-8 % to +12%. 1
Citations
| 42 | Calibration of microprocessor performance models – Black, Shen - 1998 |
| 35 | Wrong-Path Instruction Prefetching – Pierce, Mudge - 1996 |
| 20 | Instruction Cache Fetch Policies for Speculative Execution – Lee, Baer, et al. - 1995 |
| 20 | The Effect of Speculative Execution on Cache Performance – Pierce, Mudge - 1994 |
| 15 | The PowerPC User Instruction Set Architecture – Diefendorf, Silha - 1994 |
| 2 | PSIM User’s Guide,” ftp://cambridge.cygnus.com/pub/psim/index.html – Cagney - 1996 |
