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Abstract: In formal verification, we verify that a system is correct with respect to a specification. Even when the system is proven to be correct, there is still a question of how complete the specification is, and whether it really covers all the behaviors of the system. The challenge of making the verification process as exhaustive as possible is even more crucial in simulation-based verification, where the infeasible task of checking all input sequences is replaced by checking a test suite... (Update)
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BibTeX entry: (Update)
@misc{ chockler-coverage,
author = "Hana Chockler and Orna Kupferman and Moshe Y. Vardi",
title = "Coverage Metrics for Formal Verification",
url = "citeseer.ist.psu.edu/chockler03coverage.html" }
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4 How to misuse code coverage - Marick - 1999
4 A practical approach to coverage in model checking - Chockler, Kupferman et al. - 2001
4 Principles of verifiable RTL design -- a functional coding s.. (context) - Bening, Foster - 2000
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1 An rtl abstraction technique for processor microarchitecture.. - Shen, Abraham - 1999
1 Coverage metrics for model checking (context) - Chockler - 2003
1 Coverage of implementations by simulating specifications (context) - Chockler, Kupferman - 2002
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