Anantha P. Chandrakasan, Miodrag Potkonjak, Renu Mehra, Jan Rabaey, Robert W. Brodersen  Home/Search
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Abstract: : The increasing demand for portable computing has elevated power consumption to be one of the most critical design parameters. A high-level synthesis system, HYPER-LP, is presented for minimizing power consumption in application specific datapath intensive CMOS circuits using a variety of architectural and computational transformations. The synthesis environment consists of high-level estimation of power consumption, a library of transformation primitives, and heuristic/probabilistic... (Update)
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BibTeX entry: (Update)
A. P. Chandrakasan, M. Potkonjak, R. Mehra, J. Rabaey, and R. W. Brodersen. Optimizing Power Using Transformations. IEEE Transactions on CAD, Vol. 14, No. 1, pages 12--31, 1995. http://citeseer.ist.psu.edu/chandrakasan95optimizing.html More
@misc{ chandrakasan95optimizing,
author = "A. Chandrakasan and M. Potkonjak and R. Mehra and J. Rabaey and R. Brodersen",
title = "Optimizing Power Using Transformations",
text = "A. P. Chandrakasan, M. Potkonjak, R. Mehra, J. Rabaey, and R. W. Brodersen.
Optimizing Power Using Transformations. IEEE Transactions on CAD, Vol. 14,
No. 1, pages 12--31, 1995.",
year = "1995",
url = "citeseer.ist.psu.edu/chandrakasan95optimizing.html" }
Citations (may not include all citations):1262 Classification and Regression Trees (context) - Breiman, Friedman et al. - 1984
500 Numerical Recipes in C (context) - Press, Flannery et al. - 1988 ACM
296 Low-power CMOS Digital Design - Chandrakasan, Sheng et al. - 1992
207 Retiming Synchronous Circuitry (context) - Leiserson, Saxe - 1991 DBLP
159 Principles of CMOS VLSI Design: A Systems Perspective (context) - Weste, Eshragian - 1988
127 Principles of compiler Design (context) - Aho, Ullman - 1977
119 What every computer scientist should know about floating-poi.. - Goldberg - 1991
114 Fast Prototyping of Data Path Intensive Architecture (context) - Rabaey, Chu et al. - 1991
80 On Average Power Dissipation and Random Pattern Testability .. (context) - Shen, Ghosh et al. - 1992 ACM DBLP
44 Behavioral Transformation for Algorithmic Level IC Design - Walker, Thomas - 1989
42 Optimizing the Resource Utilization Using Transformations (context) - Potkonjak, Rabaey - 1991
42 Algorithm Transformation Techniques for Concurrent Processor.. (context) - Parhi
40 Transition Density, A Stochastic Measure of Activities in Di.. - Najm - 1991
38 IRSIM: An Incremental MOS Switch-level Simulator (context) - Salz, Horowitz - 1989 ACM DBLP
38 Power Estimation for High Level Synthesis (context) - Landman, Rabaey - 1993
31 Maximally Fast and Arbitrarily Fast Implementation of Linear.. (context) - Potkonjak, Rabaey ACM DBLP
27 Estimating Dynamic Power Consumption of CMOS Circuits (context) - Cirit - 1987
26 Flamel: A high-Level Hardware Compiler (context) - Trickey - 1987
24 Fast Algorithms for Discrete Cosine Transform (context) - Feig, Winograd - 1992
21 Modeling Multidimensional Data and Control Flow - Franssen, Balasa et al. - 1993
21 An Integrated CAD System for Algorithm-Specific IC Design (context) - Shung - 1991 ACM
18 Architectural Synthesis for DSP Silicon Compilers (context) - Haroun, Elmasry - 1989
15 Efficient Simulated Annealing on Fractal Energy Landscapes (context) - Sorkin - 1991 DBLP
13 An algorithm for the Evaluation of Finite Trigonometric Seri.. (context) - Goertzel - 1968
11 Transforming Linear Systems for Joint Latency and Throughput.. (context) - Srivastava, Potkonjak - 1994
4 Designing High Performance Systems to Run from 3.3V or Lower.. (context) - Dahle - 1991
4 Prediction of wiring space requirements for LSI (context) - Heller - 1977 ACM
3 Estimating Implementation Bounds for Real Time Application S.. (context) - Rabaey, Potkonjak - 1991
2 Super-Filsyn Users Manual (context) - Integrated - 1982
2 The Influence of Hardware Mapping on High-Level Synthesis (context) - Schultz
2 A 3.8ns CMOS 16x16 Multiplier Using Complementary Pass Trans.. (context) - Yano - 1990
2 A Low-power Chipset for Multimedia Applications (context) - Chandrakasan, Burstein et al. - 1994
2 Techniques and Area Estimation of VLSI Layouts (context) - Kurdahi, Parker - 1989
1 Sangiovanni-Vincentelli (context) - Special, Simulated - 1991
1 Calculation of Total Dynamic Current of VLSI Using a Switch .. (context) - Kimura, Tsujimoto - 1991
1 Estimation of Average Switching Activity (context) - Ghosh, Devedas et al. - 1992
1 Optimizing Aritmitic Elements for Signal Processing (context) - Callaway, Swartzlander - 1992
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