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Abstract: A vast array of CAD tools are available to support the design of integrated circuits. Unfortunately, tool development lags advances in technology and design methodology - the newest, most aggressive custom chips confront design issues that were not anticipated by the currently available set of tools. When existing tools cannot fill a custom design's needs, a new tool must be developed, often in a hurry. This situation arises fairly often, and many of the tools created use, or imply, some method ... (Update)
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BibTeX entry: (Update)
T.S. Chanak. "Netlist Processing for Custom VLSI via Pattern Matching", Technical report CSL-TR-95-681, Stanford, 1995. http://citeseer.ist.psu.edu/chanak95netlist.html More
@techreport{ chanak95netlist,
author = "Thomas Stephen Chanak",
title = "Netlist Processing for Custom {VLSI} via Pattern Matching",
number = "CSL-TR-95-681",
pages = "106",
year = "1995",
url = "citeseer.ist.psu.edu/chanak95netlist.html" }
Citations (may not include all citations):861 Tcl and the Tk Toolkit - Ousterhout - 1993
127 Principles of Compiler Design (context) - Aho, Ullman - 1985
97 The AWK Programming Language (context) - Aho - 1988
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38 IRSIM: An Incremental MOS Switch-Level Simulator (context) - Salz, Horowitz - 1989
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9 Validating VLSI Circuit Layout by Wirelist Comparison (context) - Ebeling, Zajicek - 1983
5 GeminiII: A Second Generation Layout Validation Tool (context) - Ebeling - 1988
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3 GRASP: A Grammar-Based Schematic Parser (context) - Bamji, Allen
3 MIPS-X: A 20-MIPS Peak, 32-bit Microprocessor with On-Chip C.. (context) - Horowitz, Chow et al. - 1987
2 Critic: A Knowledge-Based Program for Critiquing Circuit Des.. (context) - Spickelmier, Newton - 1988
1 High Performance Single Chip VAX Microprocessor (context) - Uhler - 1992
1 Rule-Based Static Debugger and Simulation Compiler for VLSI .. (context) - Kolodny, Friedman et al. - 1985
1 Dialog: an Expert Debugging System for MOS VLSI Design (context) - DeMan, Bolsens et al. - 1985
1 XREF/Coupling: Capacitive Coupling Error Checker (context) - Grundmann - 1990
1 An Expert System for Logical and Electrical Debugging of MOS.. (context) - DeMan, Bolsens et al. - 1984
1 An Interpreter for General Netlist Design Rule Checking (context) - Pelz
1 Rule-Based VLSI Verification System Constrained by Layout Pa.. (context) - Wenin, Verhasselt et al.
1 QCritic: A Rule-Based Analyzer for Bipolar Circuit Designs (context) - Bergquist, Sparkes - 1986
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