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  An enhanced multilevel algorithm for circuit placement (2003) [17 citations — 8 self]

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by Tony F. Chan, Jason Cong, Tim Kong, Joseph R. Shinnerl, Kenton Sze
In Proc. Int. Conf. on Computer Aided Design
http://ballade.cs.ucla.edu/~cong/papers/mpl2.pdf
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Abstract:

This paper presents several important enhancements to the recently published multilevel placement package mPL [12]. The improvements include (i) unconstrained quadratic relaxation on small, noncontiguous subproblems at every level of the hierarchy; (ii) improved interpolation (declustering) based on techniques from algebraic multigrid (AMG), and (iii) iterated V-cycles with additional geometric information for aggregation in subsequent V-cycles. The enhanced version of mPL, named mPL2, improves the total wirelength result by about 12 % compared to the original version. The attractive scalability properties of the mPL run time have been largely retained, and the overall run time remains very competitive. Compared to gordian-l-domino [25] on uniformcell-size IBM/ISPD98 benchmarks, a speed-up of well over 8 × on large circuits ( ≥ 100, 000 cells or nets) is obtained along with an average improvement in total wirelength of about 2%. Compared to Dragon [32] on the same benchmarks, a speed-up of about 5 × is obtained at the cost of about 4 % increased wirelength. On the recently published PEKO synthetic benchmarks, mPL2 generates surprisingly high-quality placements — roughly 60 % closer to the optimal than those produced by Capo 8.5 and Dragon — in run time about twice as long as Capo’s and about 1/10th of Dragon’s.

Citations

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