(Enter summary)
Abstract: ns three articles, which appear in
Cybersquare. Each describes one trend that will affect
future microprocessor architectures. In the second category,
each article makes the case for a different billion
-transistor architecture. Although these articles
represent the state of the art and the authors' best
guesses, the future is notoriously hard to predict in our
breakneck-paced field. Technology trends are generally
easier to predict than their effects, but trend estimates
can be wildly ... (Update)
Cited by: More
IEEE 22 Computer - Billion-Transistor Architectures..
(Correct)
LLVA: A Low-level Virtual Instruction Set Architecture - Adve, Lattner, Brukman.. (2003)
(Correct)
Instruction History Management for High-Performance Microprocessors - Bhargava (2003)
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BibTeX entry: (Update)
D. Burger and J. Goodman. Billion-Transistor Architectures. IEEE Computer, 30(9):46-50, September 1997. http://citeseer.ist.psu.edu/burger97billiontransistor.html More
@article{ burger97billiontransistor,
author = "Doug Burger and James R. Goodman",
title = "Billion-Transistor Architectures - Guest Editors' Introduction",
journal = "IEEE Computer",
volume = "30",
number = "9",
pages = "46-49",
year = "1997",
url = "citeseer.ist.psu.edu/burger97billiontransistor.html" }
Citations (may not include all citations):
1
San Jose (context) - Assoc - 1994
The graph only includes citing articles where the year of publication is known.
Documents on the same site (http://goethe.ira.uka.de/ungerer/Prozessorarchitektur/Prozessorfolien.html): More
Evaluating A Multithreaded Superscalar Microprocessor Versus .. - Ungerer, Sigmund (1996)
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