An operational semantics for the Verilog Hardware Description Language encoded using Prolog.
Abstract: Eclogue: The logic programming language Prolog is used to provide a rapid-prototype simulator for the VERILOG Hardware Description Language (HDL). The simulator is based on an operational semantics of a significant subset of the language. Using this approach allows the exploration of sometimes subtle behaviours of parallel programs and the possibility of rapid changes or additions to the semantics of the language covered. It also acts as a check on the validity of the original operational... (Update)
Context of citations to this paper: More
.... wider use, it may be necessary to interface to Hardware Description Languages (HDLs) in general industrial use such as VHDL and Verilog [10]. There is much interest and research in the area of hardware software co design from both the theoretical and the practical point of view...
.... in the L T E X document preparation system [28] source (ASCII) format used to generate the report on which this paper is based [3]. The entire contents of Sections 2 and 3 have been processed from the original Prolog source program and output generated by the Prolog...
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BibTeX entry: (Update)
Jonathan Bowen. Animating the Semantics of VERILOG using Prolog. Technical Report 176, UNU/IIST, P.O.Box 3058, Macau, September 1999. http://citeseer.ist.psu.edu/bowen99animating.html More
@techreport{ bowen99animating,
author = "Jonathan P. Bowen",
title = "Animating the Semantics of {VERILOG} using {Prolog}",
number = "176",
institution = "United Nations University, UNU/IIST",
address = "P.O.Box 3058, Macau, China",
date = "September",
year = "1999",
url = "citeseer.ist.psu.edu/bowen99animating.html" }
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