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Area-Universal Circuits with Constant Slowdown (1999)  (Make Corrections)  
Sandeep N. Bhatt, Gianfranco Bilardi, Geppino Pucci



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Abstract: An area-universal VLSI circuit can be programmed to emulate every circuit of a given area, but at the cost of lower area-time performance. In particular, if a circuit with area-time bounds (A; T ) is emulated with a universal circuit with bounds (A u ; T u ); we say that the universal circuit has blowup A u =A and slowdown T u =T . A central question in VLSI theory is to investigate the inherent costs and tradeoffs of universal circuit designs. Prior to this paper, universal designs with O(1)... (Update)

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BibTeX entry:   (Update)

@misc{ bhatt-areauniversal,
  author = "Sandeep N. Bhatt and Gianfranco Bilardi and Geppino Pucci",
  title = "Area-Universal Circuits with Constant Slowdown",
  url = "citeseer.ist.psu.edu/bhatt99areauniversal.html" }
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16   Time-optimal simulations of networks by universal parallel c.. - auf, Wanka - 1989
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8   An area-universal VLSI circuit (context) - Bay, Bilardi - 1993
6   An area lower bound for a class of fat-trees (context) - Bilardi, Bay - 1994
5   Universal emulations with sublogarithmic slowdown (context) - Kaklamanis, Krizanc et al. - 1993
2   A lower bound on area-universal graphs - Bilardi, Chauduri et al. - 1994

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