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Abstract: One of the new extensions in EPIC architectures are cache hints. On each memory instruction, two kinds of hints can be attached: a source cache hint and a target cache hint. The source hint indicates the true latency of the instruction, which is used by the compiler to improve the instruction schedule. The target hint indicates at which cache levels it is profitable to retain data, allowing to improve cache replacement decisions at run time. A compile-time method is presented which calculates... (Update)
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BibTeX entry: (Update)
K. Beyls and E. D'Hollander. Generating cache hints for improved program efficiency. Journal of Systems Architecture, 2004. in submission. 7.1 http://citeseer.ist.psu.edu/beyls04generating.html More
@misc{ beyls04generating,
author = "K. Beyls and E. D'Hollander",
title = "Generating cache hints for improved program efficiency",
text = "K. Beyls and E. D'Hollander. Generating cache hints for improved program
efficiency. Journal of Systems Architecture, 2004. in submission. 7.1",
year = "2004",
url = "citeseer.ist.psu.edu/beyls04generating.html" }
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