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HARE: A Hierarchical Allocator for Registers in Multiple Issue Architectures (1995)  (Make Corrections)  
David A. Berson, Rajiv Gupta, Mary Lou Soffa



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Abstract: In this paper we present HARE, a new hierarchical approach to register allocation and assignment for multiple issue load/store architectures. HARE makes extensive use of execution estimates and functional unit availability information to select values for spilling and to place the spill code in locations that minimize the increase in the overall execution time of the program. Incorporated in HARE is recursive allocation, a new hierarchical allocation technique that compares the costs of... (Update)

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BibTeX entry:   (Update)

@misc{ berson-hare,
  author = "David A. Berson and Rajiv Gupta and Mary Lou Soffa",
  title = "HARE: A Hierarchical Allocator for Registers in Multiple Issue Architectures",
  url = "citeseer.ist.psu.edu/berson95hare.html" }
Citations (may not include all citations):
201   Register allocation via coloring (context) - Chaitin, Auslander et al. - 1981
108   Coloring heuristics for register allocation (context) - Briggs, Cooper et al. - 1989
70   Integrating register allocation and instruction scheduling f.. (context) - Bradlee, Eggers et al. - 1991
69   Register allocation by priority-based coloring (context) - Chow, Hennessy - 1990
69   Register allocation with instruction scheduling: A new appro.. - Pinter - 1993
56   Spill code minimization techniques for optimizing compilers (context) - Bernstein, Golumbic et al. - 1989
35   spilling via graph coloring (context) - Chaitin - 1982
30   Register allocation over the program dependence graph - Norris, Pollock - 1994
29   and Linda Torczon (context) - Briggs, Cooper - 1992
20   A scheduler-sensitive global register allocator - Norris, Pollock - 1993
11   store range analysis for global register allocation (context) - Kolte, Harrold - 1993
10   Dependence-conscious global register allocation - Ambrosch, Ertl et al. - 1994
9   GURRR: A global unified resource requirements representation - Berson, Gupta et al. - 1995
5   Probablistic register allocation (context) - Proebsting, Fischer - 1992
2   Register allocation via heirachical graph coloring (context) - Callahan, Koblenz - 1991
1   and Parallelizing Transformations for Fine Grain Parallel Ar.. (context) - Berson, Register et al. - 1995

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