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Abstract: Many optimizing compilers perform global register allocation using a Chaitin-style graph coloring algorithm. Live ranges that cannot be allocated to registers are spilled to memory. The amount of code required to spill the live range depends on the spilling heuristic used. Chaitin's spilling heuristic offers some guidance in reducing the amount of spill code produced. However, this heuristic does not allow the partial spilling of live ranges and the reduction in spill code is limited to a local ... (Update)
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15: Register allocation and spilling via graph coloring (context) - Chaitin - 1982
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BibTeX entry: (Update)
P. Bergner, P. Dahl, D. Engebretsen, and M. O'Keefe. "Spill Code Minimization via Interference Region Spilling," Proc. of the 1997 ACM SIGPLAN Conf. on Programming Language Design and Implementation, pp. 287 -- 295. June 1997. http://citeseer.ist.psu.edu/bergner97spill.html More
@inproceedings{ bergner97spill,
author = "Peter Bergner and Peter Dahl and David Engebretsen and Matthew T. O'Keefe",
title = "Spill Code Minimization via Interference Region Spilling",
booktitle = "{SIGPLAN} Conference on Programming Language Design and Implementation",
pages = "287-295",
year = "1997",
url = "citeseer.ist.psu.edu/bergner97spill.html" }
Citations (may not include all citations):216 Register allocation and spilling via graph coloring (context) - Chaitin - 1982
201 Register allocation via coloring (context) - Chaitin, Auslander et al. - 1981
112 The prioritybased coloring approach to register allocation (context) - Chow, Hennessy - 1990
108 Coloring heuristics for register allocation (context) - Briggs, Cooper et al. - 1989
78 Register allocation via graph coloring - Briggs - 1992
56 Spill code minimization techniques for optimizing compilers (context) - Bernstein, Goldin et al. - 1989
2 SIGPLAN Notices (context) - Briggs, Cooper et al. - 1992
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