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Abstract: Parallel graph reduction is a conceptually simple model for the concurrent evaluation of lazy functional programs. A program is represented by a heap-based graph which forms the primary means of communication and synchronisation between processors. Execution-driven simulation is used to study the behaviour of a set of benchmark parallel functional programs compiled with a highly-optimising compiler executing on a variety of multicache shared-memory implementations. Three forms of shared-memory... (Update)
Context of citations to this paper: More
...in conventional languages. Simulation results ffl Studied caching mechanisms to support parallel functional program execution ([Ben93], BK93] ffl In high bandwidth, high latency architectures, communication costs can be dramatically reduced using very large cache...
...cell and cache line to enable the performance of the cache system to be closely monitored. The simulation scheme is more fully described in [4]. 5.1 Architectural Model We basically assume a 32 bit non pipelined load store architecture, with the following assumptions: ffl The...
Cited by: More
Futurespace: a coherent, cached, shared - Data Type Paul (Correct)
Efficient Shared-Memory Support for Parallel Graph Reduction - Bennett, Kelly (1996) (Correct)
Eliminating Invalidation in Coherent-Cache Parallel Graph.. - Bennett, Kelly (Correct)
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4: Locality and false sharing in coherentcache parallel graph reduction - Bennett, Kelly - 1993
3: Multiprocessor Execution of Functional Programs (context) - Goldberg - 1988
3: Cache coherence protocols: Evaluation using a multiprocessor simulation model (context) - James, Laundrie et al. - 1990
BibTeX entry: (Update)
Andrew Jonathan Bennett. Parallel Graph Reduction for Shared-Memory Architectures. PhD thesis, Imperial College, September 1993. http://citeseer.ist.psu.edu/bennett93parallel.html More
@phdthesis{ bennett93parallel,
author = "Bennett, Andrew J.",
title = "{P}arallel {G}raph {R}eduction for {S}hared-{M}emory {A}rchitectures",
address = "London, U. K.",
year = "93",
url = "citeseer.ist.psu.edu/bennett93parallel.html" }
Citations (may not include all citations):1 it does illustrate how the graph reduc (context) - example, simple - 1987
1 several schemes to efficiently support the unwinding phase a.. (context) - model, reduction et al. - 1988
Documents on the same site (http://src.doc.ic.ac.uk/public/ic.doc/ALA/papers/A.Bennett/): More
Sharing and Contention in Coherent-cache Parallel Graph.. - Andrew Bennett (1992) (Correct)
.4 Simulation Results - The Simulator (Correct)
Derivation and Performance of a Pipelined Transaction.. - Bennett, Kelly, Paterson (1994) (Correct)
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