Abstract. In this paper we show that efficient VLSI implementations of ADDITION are possible using constrained threshold gates (i.e. having limited fan-in and range of weights). We introduce a class of Boolean functions F s and while proving that "f D F s is linearly separable, we discover that each f D function can be built starting from the previous one (f D-2) by copying its synaptic weights. As the G-functions computing the carry bits are a subclass of F s, we are able to build a set of "neural networks " for ADDITION with the fan-in (D) as a parameter, having depth = O ( lgn
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