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Abstract: Formal verification is becoming a useful means of validating designs. We have developed a methodology for formally verifying dataintensive circuits (e.g., processors) with sophisticated timing (e.g., pipelining) against high-level declarative specifications. Previously, formally verifying a microprocessor required the use of an automatic theorem prover, but our technique requires little more than a symbolic simulator. We have formally verified a pre-existing 16-bit CISC microprocessor circuit... (Update)
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BibTeX entry: (Update)
Beatty, D. and R. Bryant, Formally Verifying a Microprocessor Using a Simulation Methodology, in Proceedings of the 31st Design Automation Conference, ACM, pg. 596--602, June, 1994. http://citeseer.ist.psu.edu/beatty94formally.html More
@inproceedings{ beatty94formally,
author = "{D.L. Beatty} and {R.E. Bryant}",
title = "{F}ormally {V}erifying a {M}icroprocessor {U}sing a {S}imulation {M}ethodology",
booktitle = "31st {ACM}/{IEEE} Design Automation Conference ({DAC})",
publisher = "San Diego Convention Center",
address = "San Diego, CA",
year = "1994",
url = "citeseer.ist.psu.edu/beatty94formally.html" }
Citations (may not include all citations):47 Formal verification of a pipelined microprocessor (context) - Srivas, Bickford - 1990
47 Formal verification by symbolic evaluation of partially-orde.. - Seger, Bryant - 1993
34 Formal hardware verification by symbolic ternary trajectory .. (context) - Bryant, Beatty et al. - 1991
31 Multi Level Verification of Microprocessor-Based Systems (context) - Joyce - 1990
29 FM8501: a Verified Microprocessor (context) - Hunt - 1985
28 Proving circuit correctness using formal comparison between .. (context) - Madre, Billon - 1988
27 Correctness properties of the Viper block model: the second .. (context) - Cohn - 1988
17 Synchronous circuit verification by symbolic simulation: an .. (context) - Beatty, Bryant et al. - 1990
5 A Methodology for Formal HardwareVerification (context) - Beatty - 1993
4 A microprocessor-based implantable telemetry system (context) - Fernald, Cook et al. - 1991
3 Van den Bout (context) - Bhuva, Barnes et al. - 1986
1 Symbolic Execution of Formal Machine Descriptions (context) - Oakley - 1979
1 The formal verification chain at BULL (context) - Madre, Coudert et al. - 1990
The graph only includes citing articles where the year of publication is known.
Documents on the same site (http://researchsmp2.cc.vt.edu/DB/db/bdd/index.html):
Symbolic Boolean Manipulation with Ordered Binary Decision Diagrams - Bryant (1992) (Correct)
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