(Enter summary)
Abstract: This paper describes VSPEC, a specification language for digital electronic systems. VSPEC
is an extension of the hardware description language VHDL. The VSPEC extensions to VHDL
are based on the Larch family of specification languages. They allow a designer to declaratively
specify what a system should do as opposed to operationally specifying a single design artifact
exhbiting desired behavior. VSPEC is parsed into an abstract syntax tree representation
and manipulated by a collection of ... (Update)
Context of citations to this paper: More
...are capable of expressing (and therefore specifying) non functional parameters. Interesting semantics showing promise include VSPEC [1, 20 22] and ViewPoints [23 26] Implementation may be possible with the Talaris framework, either explicitly or by extension. However, the...
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BibTeX entry: (Update)
P. Baraona and P. Alexander, "VSPEC: A Language for Digital System Specification," presented at AI Models for Systems Engineering Workshop at AAAI-94 Conference, Seattle, WA, 1994. http://citeseer.ist.psu.edu/baraona94vspec.html More
@misc{ baraona94vspec,
author = "P. Baraona and P. Alexander",
title = "VSPEC: A Language for Digital System Specification",
text = "P. Baraona and P. Alexander, VSPEC: A Language for Digital System Specification,
presented at AI Models for Systems Engineering Workshop at AAAI-94 Conference,
Seattle, WA, 1994.",
year = "1994",
url = "citeseer.ist.psu.edu/baraona94vspec.html" }
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