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Abstract: Modern processors use two or more levels of cache memories to bridge the rising disparity between processor and memory speeds. Compression can improve cache performance by increasing effective cache capacity and eliminating misses. However, decompressing cache lines also increases cache access latency, potentially degrading performance. (Update)
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BibTeX entry: (Update)
A. Alameldeen, D. Wood, "Adaptive Cache Compression for High-Performance Processors ", To appear in the 31 st Annual International Symposium on Computer Architecture, June 2004. http://citeseer.ist.psu.edu/alameldeen04adaptive.html More
@inproceedings{ alameldeen04adaptive,
author = "A. Alameldeen and D. Wood",
title = "Adaptive Cache Compression for High-Performance Processors",
booktitle = "31 st Annual International Symposium on Computer Architecture",
month = jun,
year = "2004",
url = "citeseer.ist.psu.edu/alameldeen04adaptive.html" }
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