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Abstract: Alewife is a multiprocessor architecture that supports up to 512 processing nodes connected over a scalable and costeffective mesh network at a constant cost per node. The MIT Alewife Machine, a prototype implementation of the architecture, demonstrates that a parallel system can be both scalable and programmable. Four classes of mechanisms in the machine combine to achieve these goals: software-extended coherent shared memory provides a global, linear address space; integrated message passing... (Update)
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BibTeX entry: (Update)
A. Agarwal et al. The MIT Alewife Machine: Architecture and Performance. In International Symposium on Computer Architecture, pages 2--13, 1995. http://citeseer.ist.psu.edu/agarwal95mit.html More
@inproceedings{ agarwal95mit,
author = "A. Agarwal and R. Bianchini and D. Chaiken and K. Johnson and D. Kranz and J. Kubiatowicz and B-H. Lim and K. Mackenzie and D. Yeung",
title = "The {MIT} Alewife Machine: Architecture and Performance",
booktitle = "Proc. of the 22nd Annual Int'l Symp. on Computer Architecture ({ISCA}'95)",
pages = "2--13",
year = "1995",
url = "citeseer.ist.psu.edu/agarwal95mit.html" }
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157 Architecture and Applications of the HEP Multiprocessor Comp.. (context) - Smith - 1981
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48 Software-Extended Coherent Shared Memory: Performance and Co.. - Anant - 1994 ACM DBLP
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4 Application Performance on the Alewife Multiprocessor (context) - Bianchini - 1994
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