Anant Agarwal, John Kubiatowicz, David Kranz, BengHong Lim, Donald Yeung, Godfrey D'Souza, Mike Parkin  Home/Search
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Abstract: Sparcle is a processor chip developed jointly by MIT# LSI Logic# and SUN Microsystems# byevolving an existing RISC architecture towards a processor suited for large#scale multi# processors. Sparcle supports three multiprocessor mechanisms# fast context switching# fast# user#level message handling# and #ne#grain synchronization. The Sparcle e#ort demonstrates that RISC architectures coupled with a communications and memory management unit do not require major architectural changes to... (Update)
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...its own memory bank, part of which is used as a portion of the single shared address space. Each node consists of a Sparcle processor [3] clocked at 20MHz, a 64KB direct mapped cache with 16 byte cache lines, a communications and memory management unit (CMMU) a floating...
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BibTeX entry: (Update)
A. Agarwal, J. Kubiatowicz, D. Kranz, B.-H. Lim, D. Yeung, G. D'Souza, and M. Parkin, "Sparcle: An Evolutionary Processor Design for Large-Scale Multiprocessors, " IEEE Micro, vol. 13, no. 3, pp. 48--61, June 1993. http://citeseer.ist.psu.edu/agarwal93sparcle.html More
@article{ agarwal93sparcle,
author = "Anant Agarwal and John Kubiatowicz and David Kranz and Beng-Hong Lim and Donald Yeoung and Geoffrey D'Souza and M. Parkin",
title = "Sparcle: An Evolutionary Processor Design for Large-Scale Multiprocessors",
journal = "IEEE Micro",
volume = "13",
number = "3",
pages = "48--61",
year = "1993",
url = "citeseer.ist.psu.edu/agarwal93sparcle.html" }
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