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Design and Evaluation of Communication Latency Hiding/Reduction Techniques for Message-Passing Environments (2000)  (Make Corrections)  
Ahmad Afsahi



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Abstract: With the availability of fast microprocessors and small-scale multiprocessors, internode communication has become an increasingly important factor that limits the performance of parallel computers. Essentially, message-passing parallel computers require extremely short communication latency such that message transmissions have minimal impact on the overall computation time. This thesis concentrates on issues regarding hardware communication latency in reconfigurable networks (optical or... (Update)

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BibTeX entry:   (Update)

@misc{ afsahi-design,
  author = "Ahmad Afsahi",
  title = "Design and Evaluation of Communication Latency Hiding/Reduction Techniques
    for Message-Passing Environments",
  url = "citeseer.ist.psu.edu/afsahi00design.html" }
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