(Enter summary)
Abstract: Scalable shared-memory multiprocessors provide a flexible
programming model with good performance scaling. These
features, however, come at the expense of additional hardware
complexity to provide a consistent view of the memory
hierarchy. Verifying this aspect of a multiprocessor system
is nontrivial, often requiring far more time than the actual
implementation. We investigate the various approaches
for verifying coherent memory systems in large-scale
multiprocessors. In the process, we define ... (Update)
Context of citations to this paper: More
.... for reasoning about higher level correctness properties, such as the correctness of a cache coherence protocol or a memory consistency model [5]. Clearly, discrete event logic simulators by themselves are ill equipped to handle the verification challenges posed by large scale...
.... for reasoning about higher level correctness properties, such as the correctness of a cache coherence protocol or a memory consistency model [5]. Clearly, discrete event logic simulators by themselves are ill equipped to handle the verification challenges posed by Simula...
Cited by: More
A Balanced Approach to High-Level Verification.. - Abts, Roberts, Lilja (2000)
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Active bibliography (related documents): More All
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1.3: A Language-Theoretic Approach to Specifying and Verifying.. - Abts, Lilja, Scott (2000)
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1.0: So Many States, So Little Time: Verifying Memory Coherence.. - Abts, Scott, Lilja (2003)
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0.2: State Pruning for Generating Efficient Test Vectors - Chen, Abts, Lilja
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0.1: Heuristics for Complexity-Effective Verification of a Cache.. - Abts, Chen, Lilja (2003)
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2: The SGI Origin: A ccNUMA Highly Scalable Server (context) - Laudon, Lenoski - 1997
2: Verifying large-scale multiprocessors using an abstract verification environment (context) - Abts, Roberts - 1999
2: Synchronization and communication in the T3E multiprocessor (context) - Scott - 1996
BibTeX entry: (Update)
Dennis Abts, David J. Lilja, Abdulla Bataineh, and Steve Scott, "Dimensions of Verifying the HardwareSoftware Interface in a Shared-Memory Multiprocessor, " Laboratory for Advanced Research in Computing Technology and Compilers Technical Report No. ARCTiC 99-04, May 1999, (http://wwwmount. ee.umn.edu/ lilja/papers.memory.html). http://citeseer.ist.psu.edu/abts99dimensions.html More
@misc{ abts99dimensions,
author = "D. Abts and D. Lilja and A. Bataineh and S. Scott",
title = "Dimensions of Verifying the HardwareSoftware Interface in a Shared-Memory
Multiprocessor",
text = "Dennis Abts, David J. Lilja, Abdulla Bataineh, and Steve Scott, Dimensions
of Verifying the HardwareSoftware Interface in a Shared-Memory Multiprocessor,
Laboratory for Advanced Research in Computing Technology and Compilers Technical
Report No. ARCTiC 99-04, May 1999, (http://wwwmount. ee.umn.edu/ lilja/papers.memory.html).",
year = "1999",
url = "citeseer.ist.psu.edu/abts99dimensions.html" }
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