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This directory is created automatically and some papers may be mislabeled. Only document within the CiteSeer database are listed. The directory is intended to provide entry points for browsing the database and is not intended to be authoritative. Papers may not appear in all relevant categories. For example, papers in a sub-category may not appear in higher level categories.

31   A Micropipelined ARM - Furber, Day, Garside, Paver, Woods (1993)   (Correct)
An asynchronous implementation of the ARM microprocessor is described. The design is based on Sutherland's Micropipelines, and allows considerable internal asynchronous concurrency. The rationale for ... / Control Structures and Microprogramming Control Design Styles

18   Code Optimization Techniques for Embedded DSP Microprocessors - Liao, Devadas, Keutzer, Tjiang, Wang (1995)   (Correct)
We address the problem of code optimization for embedded DSP microprocessors. Such processors (e.g., those in the TMS320 series) have highly irregular datapaths, and conventional code generation metho... / or residual control in microprogramming terminology The most

18   Automatic Parallelization in the Polytope Model - Feautrier (1996)   (Correct)
The aim of this paper is to explain the importance of polytope and polyhedra in automatic parallelization. We show that the semantics of parallel programs is best described geometrically, as propert... /

16   Tree-Based Mapping of Algorithms to Predefined Structures - Marwedel (1995)   (Correct)
Due to the need for fast design cycles and low production cost, programmable targets like DSP processors are becoming increasingly popular. Design planning, detailed design as well as updating such de... / oriented towards mainframe microprogramming and the associated br th Ann. Workshop on Microprogramming MICRO- pages

14   Shared Memory Consistency Conditions for Non-Sequential Execution.. - Attiya, al. (1993)   (Correct)
Introduction. In Proc. of the 18th Annual Microprogramming Workshop, pages 103--108, December 1985. [36] A. Peleg and U. Weiser. Future Trends in Microprocessors: Out-of-Order Execution, Speculative B... / In Proc. of the th Annual Microprogramming Workshop pages -

13   An Asynchronous Approach to Efficient Execution of Programs on.. - Agarwal, Wazlowski, Ghosh (1994)   (Correct)
PRISM, a computer architecture consisting of a general-purpose core processor and a reconfigurable FPGA platform, was designed to bridge the gap between general-purpose and specialized computers. The ... /

11   Designing Parallel Programs by the Graphical Language GRAPNEL - Eter Kacsuk (1996)   (Correct)
We propose a new visual programming language, called GRAPNEL (GRAphical Process's NEt Language), for designing distributed parallel programs based on the message passing programming paradigm. GRAPNEL ... /

11   The MIMOLA Language, Version 4.1 - Bashford, Bieker, Harking, Leupers.. (1994)   (Correct)
This report describes the computer hardware description language MIMOLA 4.1 (machine independent microprogramming language). MIMOLA 4.1 is the common input language for a variety of CAD tools for the ... / . machine independent microprogramming language MIMOLA . is the br or intermediate-level microprogramming. In MIMOLA the only

11   Software Pipelining with Register Allocation and Spilling - Wang, Krall, Ertl, Eisenbeis (1994)   (Correct)
Simultaneous register allocation and software pipelining is still less understood and remains an open problem. In this paper, we first present the Register Requirement Graph (RRG) which can dynamica... / International Symposium on Microprogramming and Microarchitectures

8   Post-Compaction Register Assignment in a Retargetable Compiler - Philip Sweany (1990)   (Correct)
We discuss graph-coloring register assignment in a retargetable compiler for Long-Instruction-Word architectures. Of specific concern is when, during the compilation process, should register assignmen... / In Proceedings of the th Microprogramming Workshop MICRO- San br In Proceedings of the th Microprogramming Workshop MICRO- pages

7   Compiling For Massively Parallel Architectures: A Perspective - Feautrier (1994)   (Correct)
The problem of automatically generating programs for massively parallel computers is a very complicated one, mainly because there are many architectures, each of them seeming to pose its own particu... / a Perspective JOURNAL Microprogramming and Microprocessors YEAR

7   Microlanguages for Operating System Specialization - Pu (1997)   (Correct)
Specialization is a technique that has the potential to provide operating system clients with the performance and functionality that they need, while still retaining the advantages of a simple generic... / naturally microprograms. Microprogramming is a well-known term used in br of the corresponding hardware microprogramming concepts. Our microlanguages

5   Using Transputers To Increase Speed And Flexibility Of Genetics-Based .. - Marco Dorigo   (Correct)
We implemented a distributed environment for machine learning experimentation on a transputer network. The system can be used by a researcher to build modular and efficient learning systems. The algor... / in Microprocessing and Microprogramming - North Holland

5   A High-Performance Retargetable Simulator For Parallel Architectures - Dellarocas (1991)   (Correct)
makes experimental evaluation of parallel programs an important complement to theoretical analysis. Traditional techniques used to monitor the direct execution of programs are intrusive and may lead t... /

4   Incremental Design and Formal Verification of Microcoded.. - Herbert (1992)   (Correct)
A number of microprocessors have been specified and verified using machine supported formal techniques [2], [1], [7], [8], [10]. Some of these were pre-existing designs, others were designed as part o... / Logic Control Structures and Microprogramming Microprogram Design Aids br Methodology for Verifying Microprogrammed Microprocessors Technical

4   Using Persistence to Support Incremental System Construction - Alan Dearle (1993)   (Correct)
This paper describes the use of a persistent store to support incremental system construction. A single example is elaborated throughout the paper to introduce elements of the incremental construction... /

4   A Multi-Processor Shared Memory Architecture for Parallel Cyclic.. - Rafael Lins Dept (1992)   (Correct)
this paper we generalise this architecture in such a way that multiple mutators and collectors share the same workspace. This generalisation is simple and keeps the properties of the one-mutator-one-c... / Microprocessing and Microprogramming - August .

4   Integration Of Logic Synthesis And High-Level Synthesis Into The.. - Perkowski, et.al (1989)   (Correct)
This paper presents a short description of the high level and logic synthesis stages in the digital design automation system DIADES. High level design, namely data path synthesis and control unit synt... / to be composed of either a microprogrammed units or Finite State br parts of state machines microprogrammed units and data path logic.

4   A Formal Semantic Model to fit SIL for Transformational Design - Huijs, Krol (1993)   (Correct)
SIL (SPRITE Input Language) is a single token signal flow graph representation developed as an intermediate format between specification languages and silicon compilers. This paper presents a part of ... / Microprocessing and Microprogramming pp. - .

4   Application of Constraint Logic Programming for VLSI CAD Tools - Beckmann, Bieker, Markhof (1994)   (Correct)
This paper describes the application of CLP (constraint logic programming) to several digital circuit design problems. It is shown that logic programming together with efficient constraint propagati... / machine independent microprogramming language has

3   Automatic Design of Computer Instruction Sets - Holmer (1993)   (Correct)
Automatic Design of Computer Instruction Sets by Bruce Kester Holmer Doctor of Philosophy in Computer Science University of California at Berkeley David E. Culler, Co-Chair Alvin M. Despain, Co-Chair... / . . Dynamic Microprogramming and Vertical Migration br yet complete. . . Dynamic Microprogramming and Vertical Migration In

3   Digital System Simulation with VHDL in a High-level Synthesis System - Peng (1994)   (Correct)
This paper presents the use of VHDL to simulate the intermediate design representation in a high-level synthesis system. The design representation is captured by an extended time Petri net notation ... / in Microprocessing and Microprogramming the EUROMICRO Journal Vol br K. Kuchcinski and Z. Peng Microprogramming Implementation of Timed Petri

3   An Empirical Study of Genetic Operators in Genetic Algorithms - Yao (1993)   (Correct)
This paper tries to understand when and why some genetic operators are useful and how we can combine them together to improve the performance of genetic algorithms. Experiments have been carried out t... / in Microprocessing and Microprogramming Vol. pp. - .

2   Exploiting Partial Replication in Unbalanced Parallel Loop Scheduling .. - Orlando, Perego (1995)   (Correct)
We consider the problem of scheduling parallel loops whose iterations operate on large array data structures and are characterized by highly varying execution times (unbalanced or non-uniform parallel... /

2   Threaded Prefetching: An Adaptive Instruction Prefetch Mechanism - Kim, Park, Park, Min, Shin, Kim (1993)   (Correct)
We propose and analyze an adaptive instruction prefetch scheme, called threaded prefetching, that makes use of history information to guide the prefetching. The scheme is based on the observation that... / Microprocessing and Microprogramming Journal .

2   Mechanisms for Controlling Evolutions in Persistent Object Systems - Morrison, Connor, Cuiis, Kirby.. (1993)   (Correct)
Types have Existential type". ACM TOPLAS 10,3 (1988), 470-502. [OTC90] Ohori, A., Tabkha, I., Connor, R.C.H. & Philbrow, P. "Persistence and Type Abstraction Revisited", 4th International Workshop on ... / of Microprocessors and Microprogramming pp - .

2   Using Logic Programming And Coroutining For Electronic Cad - Bieker, Neumann (1994)   (Correct)
this paper we describe the use of Prolog for a very high level of abstraction. A very elegant simulator, based on a hardware description language and a suitable Prolog circuit representation based on ... / MIMOLA machine independent microprogramming language system MSS MIMOLA br th Annual Workshop on Microprogramming Micro- pp. .

2   Microcode Generation for Flexible Parallel Target Architectures - Leupers, Schenk, Marwedel (1994)   (Correct)
Advanced architectural features of microprocessors like instruction level parallelism and pipelined functional hardware units require code generation techniques beyond the scope of traditional compi... / Control Structures and Microprogramming Microprogram Design Aids br for code generation for microprogrammed structures. The underlying

2   Floating-Point Calculations in Bit-Serial SIMD Computers - Åhlander, Svensson (1992)   (Correct)
In bit-serial, massively parallel computers the bit parallelism in the data items has been given up in favour of the much greater parallelism in the data set. Therefore this type of computers is eff... / on clever programming on the microprogramming level thus not requiring br Microprocessing Microprogramming vol. no. - pp.

1   MSSV: Tree-Based Mapping of Algorithms to Predefined Structures.. - Marwedel (1993)   (Correct)
Due to the need for fast design cycles and low production cost, programmable circuits like FPGAs and DSP processors (henceforth called target structures) are becoming increasingly popular. Design plan... / oriented towards mainframe microprogramming and the associated br of targets within the microprogramming area became attributes of

1   Formal Verification and Empirical Analysis of Rollback Relaxation - Umamageswaran, Subramani, Wilsey.. (1997)   (Correct)
this paper, we formally specify and verify the correctness of rollback relaxation. The problem is specified using the PVS Specification Language and proved using the PVS Prover. 1 Introduction Discret... /

1   Resource-Constrained Pipelining Based on Loop Transformations - Sanchez, Cortadella (1993)   (Correct)
this paper a novel technique for resource-constrained loop pipelining is presented. RCLP is based on several dependence graph operations: loop unrolling, operation retiming, resource-constrained sched... /

1   An FPGA Implementation of GENET for Solving Graph Coloring Problems - Lee Leong (1998)   (Correct)
and vertex z 1 cannot both be assigned the color 0. Once a CSP has been transformed into a network, the steps outlined below are performed to find one of its solutions. First, each connection in the ... / the corresponding cluster. A microprogramming unit is used to control the br the appropriate update. The microprogramming unit is then informed of

1   Watchdog Processors in Parallel Systems - Andrs Pataricza Istvn (1993)   (Correct)
INTRODUCTION A massively parallel multiprocessor contains several thousands of processing nodes. Yet, computing intensive applications still require extremely long execution times - weeks or even... / on Microprocessing and Microprogramming Barcelona Spain

1   Inter-Block Code Motion without Copies - Sweany (1992)   (Correct)
OF DISSERTATION INTER-BLOCK CODE MOTION WITHOUT COPIES Code motion is an important optimization for any compiler, and the necessity to include instruction scheduling in compilers for instruction-level... / In Proceedings of the th Microprogramming Workshop MICRO- br . Kog P.M. Kogge. The microprogramming of pipelined processors. In

1   Register Requirement for Exploiting Loops' Maximum Instruction-Level.. - Wang, Krall, Ertl   (Correct)
This paper studies the interaction between register requirement and loops' maximum Instruction-Level Parallelism (ILP). First, we present the minimum data dependence graph (MinDDG) of a loop to repr... / International Symposium on Microprogramming and Microarchitectures

Stephen Crane - Home Address   (Correct)
88> Microprocessor systems' project. As part of the practical work for this course, groups of students were required to design, commission and test a 68008-based microprocessor system and write a mon... / Network. Microprocessing and Microprogramming The Euromicro Journal

Rich Brown, John Hayes, Trevor Mudge - Advanced Computer   (Correct)
This report discusses our work with an emulator based on field programmable gate array technology. This technology has made possible the construction of hardware emulators capable of emulating systems... / place at the RTL level of microprogramming. Emulator Logic netlist

Michael Sobolewski, Ph.D. - Personal Data   (Correct)
mer School on Mathematical Foundations of Computer Science, University of Turku, Finland. 1973-1974: Mathematical Foundations of Computer Science Semester, Banach Center, Warsaw. 1971-1972: Courses on... / implementor - of a microprogramming device responsible for

Project Integrating Reference Object Library ... - Herrmann (1994)   (Correct)
This thesis is the third within a series of student and diploma theses at the Technical University of Berlin, which are aimed at the design and realization of an environment for object oriented softwa... / Microprocessing and Microprogramming. North-Holland

Resume of Kumar Ramaiyer - Ramaiyer   (Correct)
ions in Hypercube Indian Institute of Science, Bangalore, India. B.S., Computer Science, July 1988, G.P.A. 7.00/8.00 P.S.G. College of Technology, Coimbatore, India. B.Sc., Applied Sciences, May 19... / Ring Data Flow Computer Microprogramming and Microprocessing October

A High Speed Prolog Implementation on a VLIW Processor - Schenk Institut (1989)   (Correct)
A microprogrammable target computer allows implementinga virtual machine efficiently. When implementing a compiler based high level language, the semantic level of the machine language has to be fix... / Kiel W. Germany Abstract A microprogrammable target computer allows br desirable machine language on a microprogrammable target computer. The

The CEPRA-1X Cellular Processor - Hochberger, Hoffmann, Völkmann.. (1996)   (Correct)
Cellular processing needs a high performance for the computation and real time visualization because of the high amount of new cell states which have to be computed in each generation. Sequential work... / Volkmann Jens Steuerwald Microprogramming and Computer Architecture

Formal Verification of Hardware using HOL - Marco Benini (1996)   (Correct)
ion . . . . . . . . . . . . . . . . . . . . . . 56 4.1.3 General Time Representation . . . . . . . . . . . . . . . . 56 4.2 Flip-Flops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 ... / . . The Microprogramming Level Model . br . . Verification of Microprogramming Level Model .

Some Performance Figures for the G-Machine and its Optimisations - Rafael Lins (1992)   (Correct)
Machine The G-code generated is executed in the abstract G-Machine [1]. A state in this machine is described as a 7-tuple hO; C; S; V; G; E; Di, where O: is the output ever produced, i.e. a sequence... / appear Microprocessing and Microprogramming. R.D.Lins br Machine. Microprocessing Microprogramming vol - -

The Cells Start Walking: Moving Objects in CDL++ - Hochberger, Hoffmann, Waldschmidt   (Correct)
We introduce a new model and a description for objects which can move around on a cellular grid. In the movement part of the model the objects specify the direction in which they want to move. The con... / Stefan Waldschmidt Microprogramming and Computer Architecture

Application Specific Conversation Schemes For Ada Programs - Alexander Romanovsky (1995)   (Correct)
The paper considers a development of the conversation scheme version proposed by A.Clematis and V.Giannuzzi in Microprocessing and Microprogramming (Vol.32, No.1-5, 1991) [5] and Computer Languages ... / in Microprocessing and Microprogramming Vol. No. - br programs Microprocessing and Microprogramming - - .

Wisdom: The Foundation of a Scalable Parallel Operating System - Kevin Murray (1990)   (Correct)
There is a demand for ever more powerful computing facilities, and for the ability to improve the power of those that are already owned, without the need to replace machines. This thesis examines a me... / Microprocessing and Microprogramming Proceeding of EUROMICRO br Microprocessing and Microprogramming Proceeding of EUROMICRO

Instruction-Set Modelling for ASIP Code Generation - Leupers, Marwedel (1996)   (Correct)
A main objective in code generation for ASIPs is to develop retargetable compilers in order to permit exploration of different architectural alternatives within short turnaround time. Retargetability ... / previous work in the area of microprogramming and retargetable br earlier in the area of microprogramming. Davidson et al. present

T.VARVARIGOU, V.P. ROYCHOWGHURY, T.KAILATH: Scheduling In and Out - Forests In   (Correct)
s, Marseille, 10-14 June, 1996. [Kal96c] T.KALINOWSKI: Modelling of Anticipated Link Connection Switching in Dynamically Reconfigurable Multi-transputer System, In: P.Kacsuk (Ed.), Proc. of the 1st A... / Microprocessing and Microprogramming Vol. pp. - . br Control of Link Connections Microprogramming and Microprocessing Vol.

A System for Microcode Reduction - Reinhard Rauscher (1996)   (Correct)
The design flow in the development of microcontrolled devices deals with a large number of design decisions which subsequently influence the realization costs. Some of these decisions are arbitrary ch... / interest in the field of microprogramming. So there still exists the br still exists the need for microprogrammed architectures and dedicated

A Worst Case Timing Analysis Technique for Instruction Prefetch.. - Minsuk Lee (1994)   (Correct)
ion), which contains detailed timing information of the program construct. By defining a concatenation operation on WCTAs, our revised timing schema accurately accounts for the timing effects of the b... / Microprocessing and Microprogramming - - Dec.

Specification and Coordination of Long-Running Design Activities for.. - Haeng Rae   (Correct)
This paper presents a new transaction management scheme, LOT, for coordinating design activities in CAD Environments. Unlike the previous approaches for coordinating design activities, in which each d... / Journal of Microprocessing and Microprogramming - -

The Parallel Program Development Environment CDL/ACL for Cellular.. - Hochberger, Hoffmann, Schneider (1997)   (Correct)
Cellular processing is a simple yet attractive model for parallel processing. First we will give a short introduction to cellular processing, then we will describe the two main elements of a correspon... / R. Hoffmann R. Schneider Microprogramming and Computer Architecture

A High Level Synthesis Algorithm Including Control Constraints - Verdier, Safir, Zavidovique (1992)   (Correct)
Data path synthesis and control part synthesis are strongly interdependent. This fact vindicates a novel approach for early control optimization in terms of the number of commands, while data path is ... / on microcode optimization for microprogrammed controllers and on boolean br Figure Basic structure of a microprogrammed controller different

Rule-Based Routing for Fault-Tolerant Parallel Computers - Brockmann, Döring, Kosch, Lustig.. (1996)   (Correct)
Routing has an important influence on the performance of interconnection networks in parallel computers. Besides simple oblivious schemes like xy-routing for 2D grids there exist a lot of sophistica... / Conventional approaches like microprogramming are not fast enough to

Recent Results and Perspectives of the Project "Cellular Processing" - Hochberger, Hoffmann, Schneider..   (Correct)
multiple rules in one design, to allow different cells to have a specialized behaviour. ffl A powerful extension to CDL is the support of moving objects (mob). In certain applications there is a nee... / of Computer Science Microprogramming and Computer Architecture

An Optimization Strategy for Cellular Processing - Schneider, Hoffmann, Hochberger   (Correct)
When massively parallel processing comes to mind, Cellular Processing and run time optimization seem to stand on opposite sides. Normally, Cellular Processing is not considered as an application depen... / R. Hoffmann C. Hochberger Microprogramming and Computer Architecture

A high level language for the RAPID-2 massively parallel accelerator.. - Pascal Faudemay   (Correct)
In this paper, we present an abstract model of the RAPID-2 SIMD architecture. RAPID-2 is a massively parallel add-on board for PCs. It implements a "paginated set-associative" model of architecture, a... / is micro-programmed. Direct microprogramming of the machine is a lengthy

On the Formal Semantics of a CHDL - A Case Study - Ulrich Bieker (1993)   (Correct)
The semantics of HDL descriptions influences all facets of VLSI design such as synthesis, test, verification, logic simulation and fault simulation. In this paper formal semantics of the intermediate ... / machine independent microprogramming language BMSJ is a

Solving Routing Problems with Cellular Automata - Hochberger, Hoffmann (1996)   (Correct)
New variants of the classical Lee algorithm for the routing of connections on printed circuits or chips have been found when mapping it onto the cellular processing model. Two cellular algorithms are ... / C. Hochberger R. Hoffmann Microprogramming and Computer Architecture

Improving the Performance of High-Level Synthesis - Peter Marwedel (1989)   (Correct)
In this paper we study possible improvements of high-level (architectural) synthesis processes. We allow the designer to indicate a set of bindings between behaviour and structure in order to add so... / Microprocessing and Microprogramming Vol. . . br Microprocessing and Microprogramming Vol. User

High-Level Synthesis for High-Speed - Hochberger, Hoffmann, Waldschmidt (1998)   (Correct)
this paper is an uncommon high--level synthesis approach. Combined with a special post processing step it is capable of producing circuits that can run at very high speed in FPGAs. At first we will gi... / Stefan Waldschmidt FG Microprogramming and Computer Architecture

[?], pages 573--576, Den Haag (Netherlands), 1992. [OMR2]. [TA82] A.. - Th International   (Correct)
of paper submitted for the International Computer Music Conferecne, 1989. [MM91] W. F. McGee and Paul Merkley. The optical scanning of medievel music. Computers and the Humanities, 25(1):47--53, 1991.... / Microprocessing and Microprogramming - . CBT br Microprocessing and Microprogramming - . CBT

Hardware Supported Simulation System for Graph Based and 3D Cellular.. - Hartmann, Hochberger, Schneider..   (Correct)
This paper presents results of a project in which a hardware supported simulation system for Cellular Processing (CP) is implemented. For three dimensional regular CP the hardware architecture, the ce... / Schneider K.P. Volkmann Microprogramming and Computer Architecture

Silicon Compilation and Rapid Prototyping of Microprogrammed.. - Hendrich, Lohse, Rauscher (1992)   (Correct)
We describe our MIM2SOLO Silicon Compiler which integrates the MIMOLA high-level synthesis system and the SOLO 1400 standard-cell IC design system. Key features of the system are synthesis from an alg... / and Rapid Prototyping of Microprogrammed VLSI-Circuits with MIMOLA br MIMOLA Machine Independent MicrOprogramming LAnguage The MIMOLA

Communicating Active Components: An Environment For Concurrent.. - Luc Courtrai (1992)   (Correct)
Programming the multicomputers is often a delicate job. This explains our interest in the design and the implementation of an Object-Oriented Parallel Language for a multicomputer. This work is part... /

Computing System Descriptions for Systems Software - Mark Bailey (1995)   (Correct)
The proliferation of high-performance microprocessors in recent years has made the development of systems software, such as compilers, assemblers, linkers, debuggers, simulators, and other related too... / include register transfer microprogramming and microarchitecture.

A Bibliography of Publications about the MINIX Operating System - Beebe (1998)   (Correct)
4093, USA, 1995. iv + 27 pp. REFERENCES 12 Tanenbaum:1991:MIP [Tan91b] Andrew S. Tanenbaum. MINIX 1.5 5 1/4in for the IBM PC, XT, AT, 386 and PS/2, 1991. ISBN 0-13585076 -2. 17 computer disks. Tane... / system. Microprocessing and Microprogramming - August br on Microprocessing and Microprogramming. Hardware and Software

Flexible HW Synthesis and Optimization by Incremental Design.. - Eikerling, al. (1994)   (Correct)
27> Conference, pages 337 -- 343. ACM/IEEE, June 1988. [Trick87] H. Trickey. Flamel: A high-level hardware compiler. IEEE Transactions on ComputerAided Design, 6(2):259--269, March 1987. [IV91] Stanf... / machines. Microprocessing and Microprogramming North Holland br plam. Microprocessing and Microprogramming North Holland -

Generation of Firmwarecompilers - Goeschka (1995)   (Correct)
Development of microprogrammed hardware requires hardware/firmware-codesign: The bottleneck in this development cycle is the manual adjustment of the firmwarecompiler: Each modification of the hardwar... / Abstract Development of microprogrammed hardware requires br resources. Development of microprogrammed hardware requires

A Microprogramming Animation - Robbins, Robbins   (Correct)
This paper describes a successful project using computer animation to teach the concepts of microprogramming to lower division computer science majors. The students write a simulator for the Mic-1 h... / A Microprogramming Animation Steven Robbins br to teach the concepts of microprogramming to lower division computer

Development of an PCI to SCI Card with FPGAs - Acher, Karl, Leberecht   (Correct)
The SMiLE project at LRR-TUM adopts and implements the Scalable Coherent Interface (SCI) interconnection technology to couple Pentium-II based PCs into a compute cluster with distributed shared memory... / demonstrate how traditional microprogramming techniques can be applied for br complex protocol processing microprogramming concepts have been applied

International Journal Of Parallel Programming - Unknown (1986)   (Correct)
ion for Controlling Parallelism Mark T. Vandevoorde and Eric S. Roberts Volume 17, Number 5: October 1988 ffl Implementing a Scheme-based Parallel Processing System James S. Miller ffl Practical Pa... / Guang Rong ffl Parallel Microprogramming Tools for a Horizontally

Audio Processing Systems - Zölzer (1997)   (Correct)
This tutorial 1 gives an introduction into several hardware aspects for designing audio processing systems based on digital signal processors (DSP). Digital signal processors of different manufactur... / hard wired instruction no microprogramming processing most of the

An Integrated Educational Environment for Computer Architecture and.. - Djordjevic, Bojovic, Milenkovic (1998)   (Correct)
The paper presents an integrated educational environment for teaching courses in computer architecture and organisation at the Faculty of Electrical Engineering, University of Belgrade. The integrat... / some of the various types of microprogramming techniques. . . The br while the remaining three the microprogramming technique with the mixed and

A Multiple Floating Point Coprocessor Architecture - Rauchwerger, Farmwald   (Correct)
General purpose microprocessor based computers usually speed their arithmetic processing performance by using a floating point co-processor. Because adding more coprocessors represents neither a techn... /

-525B: Computer Architecture Handout - Course Syllabus Issued   (Correct)
This course examines the basic principles and techniques used in the design and evaluation of high-performance computer architectures. The course stresses the principal concepts which are embodied in ... / Instruction Set random logic microprogramming. . The RISC vs. CISC

-505A: High-Performance Computer Architecture Handout - Course Syllabus Issued   (Correct)
This course examines the basic principles and techniques used in the design and evaluation of high-performance computer architectures. The course stresses the principal concepts which are embodied in ... / Instruction Set random logic microprogramming. . The RISC vs. CISC

IEEE Computer Society Technical Committee Membership Application - Please Return Form   (Correct)
Machine Models for Highly Parallel Computers, University of Leeds, UK. Contact J. R. Davy, E-mail: davyjr@scs. leeds.ac.uk. May 10-12, 1993, Parallel CFD 93, Int'l Conference on the use of Parallel S... / and Microcomputers Microprogramming and Microarchitecture

Functional Microprogramming for a Data Parallel Architecture - John Donnell Department   (Correct)
This paper addresses the problem of using functional programming on a SIMD or data parallel architecture. Each type of operation the architecture can perform corresponds to a particular function ... / Functional Microprogramming for a Data Parallel br or firmware is called microprogramming. A microprogram is at a lower

An Object-Oriented Model of Design Evolution - Colin Charlton Paul (1993)   (Correct)
this paper is concerned with. unknown An Object-Oriented Model of Design Evolution Colin Charlton, Paul Leng and Mark Rivers Department of Computer Science, University of Liverpool P.O. Box 147, Br... /

Active Object Oriented Databases in Control Applications - Loborg, Risch, Sköld, Törne (1993)   (Correct)
This paper describes a unified architecture for control applications using an extended object-oriented database system with queries and rules. We specify the requirements that control applications dem... /

Title Word Cross-Reference - Bit Access Achieving   (Correct)
array [211]. art [6, 95]. arterial [13]. arts [237]. assemblers [171, 204]. assembly [123]. Assignment [87]. associative [211]. astronomers [99]. Automated [16, 58]. Automatic [148]. automation ... / Microprogram microprogrammable br microprogramming migration

Regular Issue Brief Papers - Microcode Optimization With   (Correct)
Microcode optimization is an NP-complete combinatorial optimization problem. This paper proposes a new method based on the Hopfield neural network for optimizing the wordwidth in the control memory of... / in the control memory of a microprogrammed digital computer. We present br problem in designing effecient microprogrammed controllers in a digital

An Object Oriented Simulator of Computer Microarchitectures - Abbattista, dell'Aquila, Pizzutilo.. (2000)   (Correct)
Object Oriented approach for describing computer microarchitectures allows a class definition which eliminate the need for writing special-purpose simulators. Simulating hardware components of comput... / and simulation activities of microprogrammed computer are supported by a br architecture simulator at the microprogramming level by using object

A Bibliography of Publications in IEEE Computer: 1972-1979 - Beebe (2000)   (Correct)
ray [211]. art [6, 95]. arterial [13]. arts [237]. assemblers [171, 204]. assembly [123]. Assignment [87]. associative [211]. astronomers [99]. Automated [16, 58]. Automatic [148]. automation [1... / Microprogram microprogrammable br microprogramming migration

Using the DEVS Paradigm to Implement a Simulated Processor - Sergio Daicz Alejandrotrccoli   (Correct)
This work is devoted to present the design and implementation of Alfa-1, a simulated computer with educational purposes. The DEVS formalism was used to attack the complexity of the design, allowin... / language instruction set microprogramming and digital logic levels are

Configurable Cells: Towards Dynamic Architectures - Ricardo Duarte Edil (1993)   (Correct)
The development of a recent technological product, referred to as Array of Configurable Logic Cells, promotes many opportunities for research and implementation of digital circuits. These arrays inclu... /

Code Generation and Optimziation Techniques for Embedded Digital.. - Stan Liao And   (Correct)
Introduction The advent of 0.5 processing that allows for the integration of 5 million transistors on a single integrated circuit has brought forth new challenges and opportunities in embedded-system... / or residual control in microprogramming terminology Two simple

Development and Evaluation of a Multimedia Education Concept for the.. - Schwarz, Hunger, Werner   (Correct)
Introduction The subject "Fundamentals of Computer Science" at the Gerhard-Mercator University of Duisburg is an important fundamental offer for different degree courses, e.g. the German "Diplom Inge... / Sequential Circuits Microprogramming Finit State Machines

ESCAPE:Environment for the Simulation of Computer Architectures for.. - Jan Van Campenhout   (Correct)
We have developed ESCAPE , an easy-to-use, highly interactive portable PC-based simulation environment aimed at the support of computer architectureeducation. The environment can simulate both a micro... /

Experiences In Modeling And Simulation Of Computer Architectures In.. - Wainer, Daicz, Troccoli   (Correct)
The use of traditional approaches to teach Computer Organization usually generates misconceptions in the students. The simulated computer ALFA-1 was designed to fill this gap. DEVS was used to attac... / language instruction sets microprogramming and digital logic. Lower br in instruction set designing microprogramming or digital logic. With this

Computer Architecture Fall 2000 - Ce- Call Sec   (Correct)
Introduction 1.Cost and Trends 2.Amdahl's Law, Measuring Performance. 3.Basics of memory hierarchy 2.Instruction Sets. 1.Classification - Operands, Addressing. 2.Operations and Operand types/sizes 3.C... /

IEEE November 10 - 13, 1999 San Juan, Puerto Rico - Use Of Multidisciplinarity   (Correct)
An ongoing trend in teaching is to employ Multidisciplinarity to help students understand concepts involved in more than one subject, contextualizing the knowledge and avoiding its segmentation. unkno... /

Byzantine Generals in Action: - Implementing Fail-Stop Processors   (Correct)
this paper, the problem of approximating fail-stop processors is discussed. Use of fail-stop processors is compared with the state machine approach, another general paradigm for constructing fault-tol... /

Retrospective: - Software Pipelining An   (Correct)
The basic idea behind software pipelining was first developed by Patel and Davidson for scheduling hardware pipe-lines. As instructionlevel parallelism made its way into general-purpose computing, it... /

Code size minimization and retargetable assembly - For Custom Epic   (Correct)
this paper is to describe a series of code size minimization techniques used within PICO, some of which are applied during the automatic design of the instruction format, while others are applied duri... / Control Structures and Microprogramming Control Structure br well-known technique from the microprogramming literature is the use of

Co-Synthesis of Instruction Sets and Microarchitectures - Huang (1994)   (Correct)
The design of an instruction set processor includes several related design tasks: instruction set design, microarchitecture design, and code generation. Although there have been automatic approaches f... / of control styles e.g.microprogrammed finite state machine br Kumar Automatic Synthesis of Microprogrammed Control Units from Behavior

On the Semantics of the TREEMOLA Language Version 4.0 - Bieker (1992)   (Correct)
This report is intended to fill this gap in the context of MIMOLA. MIMOLA [BMSJ91] is a computer hardware description language (CHDL) which has been influenced by other hardware description languages ... /

Support of an Actor Environment on Distributed Architectures - Courtrai, Roos, Geib, Méhaut   (Correct)
Distributed Programming is not easy and parallel objects languages (for instance Actor languages) are a well suited way to facilitate the programming of Distributed Architectures. Our research team ... /

Reusable Application-Dependent Machine Descriptions - Bailey, Davidson (1996)   (Correct)
The proliferation of high-performance microprocessors in recent years has made the development of systems software, such as compilers, assemblers, linkers, debuggers, simulators, and other related t... /

Software Pipelining with Reduced Register Requirement - Wang, Krall, Ertl   (Correct)
Although it is well-known that a strong interaction exists between software pipelining and register allocation, simultaneous software pipelining and register allocation is still less understood and ... / ternational Symposium on Microprogramming and Microarchitectures br International Symposium on Microprogramming and Microarchitectures

to Model Digital Circuit Design Data - Colin Charlton Paul (1991)   (Correct)
This paper describes an ongoing project to build a digital circuit design framework unknown Using C to Model Digital Circuit Design Data Colin Charlton, Paul Leng and Mark Rivers Department of Comp... /

A Denotational Semantics for SIL-1 As Basis For Transformational.. - Huijs   (Correct)
Transformational design is a promising design methodology which combines correctness by construction and interactive design. In this design methodology the design steps are behaviour preserving transf... / Microprocessing and Microprogramming - .

Implementation of Hardware Structures Through Configurable Logic - Jonas Knopman Edil   (Correct)
This paper describes an alternative approach to implement Computer Architecture Structures. It employs an array of identical devices that can be dynamically configured by the application programmer. K... /

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