(Enter summary)
Abstract: We explore the design space of Field Programmable Gate
Arrays (FPGAs), Processors and ASICs -- Hardware-Software
Tri-design -- in the framework of encryption for hand-held
communication units.
IDEA (International Data Encryption Algorithm) is used
to show the tradeoffs for the suggested technologies. The
measures for comparing different options are: Performance,
Programmability and Power (P
3
). More specifically we use
the Performance to Power, or Operations to Energy ratio
MOPS/Watt and... (Update)
Context of citations to this paper: More
.... processor implementation using FPGAs achieved a theoretical throughput of 528 Mbps although it required four Xilinx XC4020XL devices [100]. An FPGA bit serial implementation of IDEA using a single Xilinx Virtex XCV1000 6 device achieved a through put of 2 Gbps [91] while an...
...provided that the application matches well the spatial structures of FPGAs and reveals a sufficient amount of parallelism. Mencer et al. [3] compared different implementations of the IDEA cryptography algorithm on RISC and DSP processors and on an FPGA. Abnous et al. 4]...
Cited by: More
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The Case for Reconfigurable Hardware in Wearable.. - Plessl, Enzler, Walder, .. (2003)
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Reconfigurable Hardware in Wearable Computing Nodes - Plessl, Enzler, Walder.. (2002)
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0.4: A Selection of Recent Advances in Computer Systems - Mencer, Flynn (1997)
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0.4: A Bit-Serial Implementation of the International Data.. - Leong, Cheung, Tsoi.. (2000)
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0.4: Tradeoffs in Parallel and Serial Implementations of the .. - Cheung, Tsoi, Leong.. (2001)
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0.5: Object-Oriented Domain Specific Compilers for Programming .. - Mencer, Platzner, Morf.. (2001)
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0.3: StReAm: Object-Oriented Programming of Stream.. - Mencer, Hübert, Morf.. (2000)
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0.2: Application of Reconfigurable CORDIC Architectures - Mencer, Séméria, Morf, Delosme (1999)
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9: An FPGA Implementation and Performance Evaluation of the CAST-256 Block Cipher
- Elbirt - 1999
6: Applied Cryptography (context) - Schneier - 1996
6: Programmable active memories: a performance assessment
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BibTeX entry: (Update)
O. Mencer, M. Morf, M. Flynn, Hardware Software TriDesign of Encryption for Mobile Communication Units, (submitted to ASSP '98). http://citeseer.ist.psu.edu/95849.html More
@misc{ mencer-hardware,
author = "O. Mencer and M. Morf and M. Flynn",
title = "Hardware Software TriDesign of Encryption for Mobile Communication Units",
text = "O. Mencer, M. Morf, M. Flynn, Hardware Software TriDesign of Encryption
for Mobile Communication Units, (submitted to ASSP '98).",
url = "citeseer.ist.psu.edu/95849.html" }
Citations (may not include all citations):
93
Programmable Active Memories: A Performance Assessment
- Bertin, Roncin et al. - 1992
22
An Assessment of the Suitability of FPGA-Based Systems for u..
- Petersen, Hutchings - 1995
20
Hardware Speedups in Long Integer Multiplication
- Shand, Bertin et al. - 1991
18
Lecture Notes in Computer Science (context) - Lai, Massey et al. - 1991
11
Comparing the performance of FPGA-based custom computers wit.. (context) - Bergmann, Mudge - 1994
11
Regular VLSI-architectures for multiplication modulo (context) - Curiger, Bonnenberg et al. - 1991
6
VINCI: VLSI Implementation of the New Secret-Key Block Ciphe.. (context) - Curiger, Bonnenberg et al. - 1993
6
the VLSI Implementation of the International Data Encryption.. (context) - Wolter, Matz et al. - 1995
3
IEEE Computer Magazine (context) - Mangione-Smith, Hutchings et al. - 1997
1
Hakkarainen TI's New 'Cx DSP Scream MIP Microprocessor Repo.. (context) - TI, Screams et al. - 1997
The graph only includes citing articles where the year of publication is known.
Documents on the same site (http://umunhum.stanford.edu/~oskar/pubs2.html):
Application of Reconfigurable CORDIC Architectures - Mencer, Semeria, Morf, Delosme (2000)
(Correct)
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