Ngeci Bowman, Neal Cardwell, Christoforos E. Kozyrakis, Cynthia Romer, Helen Wang  Home/Search
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Abstract: Computer memory systems are increasingly a bottleneck limiting application performance. IRAM architectures, which integrate a CPU with DRAM main memory on a single chip, promise to remove this limitation by providing tremendous main memory bandwidth and significant reductions in memory latency. To determine whether existing microarchitectures can tap the potential performance advantages of IRAM systems, we examined both execution time analyses of existing microprocessors and system simulation... (Update)
Context of citations to this paper: More
.... is to combine a good sized proces sor, caches, and much DRAM on a chip and make the chip the main compute engine in the machine [4, 19, 27]. A difficulty with this approach is that traditional processors are not designed to exploit a huge amount of very close DRAM any...
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0.6: The Performance of Applications and Operating Systems on.. - Bowman, Cardwell, Romer (Correct)
0.5: The Energy Efficiency of IRAM Architectures - Fromm, Perissakis, Cardwell.. (1996) (Correct)
0.1: Revisiting the Cache Interference Costs of Context Switching - Fromm, Treuhaft (Correct)
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0.4: Scaling Processors to 1 Billion Transistors and Beyond: .. - Perissakis, Kozyrakis, .. (Correct)
0.4: Intelligent RAM (IRAM): the Industrial Setting.. - Patterson.. (Correct)
0.4: Scalable Processors in the Billion-Transistor Era: IRAM - Kozyrakis, Perissakis.. (1997) (Correct)
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BibTeX entry: (Update)
N. Bowman, et al. "Evaluation of existing architectures in IRAM systems. " Workshop on Mixing Logic and DRAM, June 1997. http://citeseer.ist.psu.edu/article/bowman97evaluation.html More
@inproceedings{ bowman97evaluation,
author = "Doug A. Bowman and Larry F. Hodges",
title = "An Evaluation of Techniques for Grabbing and Manipulating Remote Objects in Immersive Virtual Environments",
booktitle = "Symposium on Interactive 3D Graphics",
pages = "35-38, 182",
year = "1997",
url = "citeseer.ist.psu.edu/article/bowman97evaluation.html" }
Citations (may not include all citations):1575 Computer Architecture: A Quantitative Approach (context) - HENNESSY, PATTERSON - 1996
87 Complete computer system simulation: The SimOS approach - ROSENBLUM - 1995
45 A Case for Intelligent RAM - PATTERSON - 1997
40 Performance characterization of the Pentium Pro processor (context) - BHANDARKAR, DING - 1997
39 Characterization of ALPHA AXP performance using TP and SPEC .. (context) - CVETANOVIC, BHANDARKAR - 1994
37 The Energy Efficiency of IRAM Architectures - FROMM - 1997
10 The SimOS simulation environment (context) - HERROD - 1996
2 MbDRAM with built-in selftest and repair function (context) - KOIKE - 1996
2 Evaluation and Comparison of Existing Cache Designs Implemen.. (context) - KOZYRAKIS, ANDWANG
1 clock access 250MHz 256Mb SDRAM with a synchronous mirror de.. (context) - SAEKI - 1996
1 The performance of Real Applications and Operating Systems o.. (context) - BOWMAN, CARDWELL et al.
The graph only includes citing articles where the year of publication is known.
Documents on the same site (http://iram.cs.berkeley.edu/publications.html): More
The Energy Efficiency of IRAM Architectures - Fromm, Perissakis, Cardwell.. (1996) (Correct)
Intelligent RAM (IRAM): the Industrial Setting.. - Patterson.. (Correct)
Efficient FFTs on IRAM - Thomas, Yelick (Correct)
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