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Abstract: This report reflects work that has been partially funded by the Deutsche Forschungsgemeinschaft
under contract DFG La 426/13-2. (Update)
Context of citations to this paper: More
.... checking techniques for asynchronous circuits [Fra97,Fra98,Fra99b] as well as controller synthesis techniques for synchronous circuits [Fra96b,Fra96c,Fra97] have been derived from the decision procedures. To the best of our knowledge, these are the first e#ective procedures...
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BibTeX entry: (Update)
Martin Franzle. Hardware synthesis from temporal logic: Undecidability need not matter. Position paper, Hardware Synthesis and Verification Workshop, Cornell University, Ithaca, USA, August 1996. http://citeseer.ist.psu.edu/article/franzle96hardware.html More
@misc{ franzle96hardware,
author = "M. Franzle",
title = "Hardware synthesis from temporal logic: Undecidability need not matter",
text = "Martin Franzle. Hardware synthesis from temporal logic: Undecidability
need not matter. Position paper, Hardware Synthesis and Verification Workshop,
Cornell University, Ithaca, USA, August 1996.",
year = "1996",
url = "citeseer.ist.psu.edu/article/franzle96hardware.html" }
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Synthesizing controllers from duration calculus
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and Hans Rischel (context) - Grossman, Nerode et al. - 1993
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