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Abstract: Recent work has demonstrated that cache space is often poorly utilized. However, no previous work has yet demonstrated upper bounds on what a cache or local memory could achieve when exploiting both spatial and temporal locality. Belady's MIN algorithm does yield an upper bound, but exploits only temporal locality. In this article, we present an optimal replacement algorithm for local memory that exploits temporal locality and spatial locality simultaneously. This algorithm is an extension of... (Update)
Context of citations to this paper: More
...the profiling technique. The references that are labeled as capacity miss are references that are identified by the algorithm described in [19]. 3.2 Computing Scores After the profiles have been gathered the scores are computed. For a set index function H the score is the sum of...
.... will have the minimal number of cache misses any cache of the same size for any possible sequence of references can have [SA93, Tem98] 2.4 State of the Art In the following, an overview of the state of the art in microprocessor technology is given with an emphasis on the...
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BibTeX entry: (Update)
Olivier Temam. Investigating Optimal Local Memory Performance. In Proceedings of the Eighth Symposium on Architectural Support for Programming Languages and Operating Systems, pages 218--226, October 1998. http://citeseer.ist.psu.edu/article/temam98investigating.html More
@inproceedings{ temam98investigating,
author = "Olivier Temam",
title = "Investigating Optimal Local Memory Performance",
booktitle = "Architectural Support for Programming Languages and Operating Systems",
pages = "218-227",
year = "1998",
url = "citeseer.ist.psu.edu/article/temam98investigating.html" }
Citations (may not include all citations):232 A Study of Replacement Algorithms for a Virtual-Storage Comp.. (context) - Belady - 1966
124 A study of integrated prefetching and caching strategies - Cao, Felten et al. - 1995
110 Memory bandwidth limitations of future microprocessors - Burger, Kagi et al. - 1996 ACM DBLP
94 Stride Directed Prefetching in Scalar Processors (context) - Fu, Patel et al.
57 Digital Equipment Corporation (context) - Corporation, user et al. - 1995
38 Efficient simulation of caches under optimal replacement wit.. - Abraham, Sugumar - 1993 ACM DBLP
30 The Declining Effectiveness of Dynamic Caching for GeneralPu.. - Burger, Kagi et al. - 1996
19 Design of the hp pa-7200 cpu - Chan, Hay et al. - 1996
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