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Low-Power FPGA Using  (Make Corrections)  
Pre-defined Dual-Vdd/Dual-Vt Fabrics Fei Li, Yan Lin, Lei He and Jason Cong ...



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Abstract: Traditional FPGAs use uniform supply voltage Vdd and uniform threshold voltage Vt. We propose to use pre-defined dual-Vdd and dual-Vt fabrics to reduce FPGA power. We design FPGA circuits with dual-Vdd/dual-Vt to e#ectively reduce both dynamic power and leakage power, and define dual-Vdd/dual-Vt FPGA fabrics based on the profiling of benchmark circuits. We further develop CAD algorithms including power-sensitivity based voltage assignment and simulated-annealing based placement to leverage... (Update)

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1.6:   Low-Power FPGA Using Pre-defined Dual-Vdd/Dual-Vt Fabrics - Li, Lin, He, Cong (2004)   (Correct)
0.6:   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI).. - Fujio Ishihara Farhana   (Correct)
0.4:   Pushing ASIC Performance in a Power Envelope - Puri, Stok, Cohn, Kung, Pan.. (2003)   (Correct)

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BibTeX entry:   (Update)

@misc{ dual-vt-lowpower,
  author = "Pre-Defined Dual-Vdd Dual-Vt",
  title = "Low-Power FPGA Using",
  url = "citeseer.ist.psu.edu/766129.html" }
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