Microprocessors Jason A. Blome, Shantanu Gupta, Shuguang Feng, Scott Mahlke...  Home/Search
Context
Related
| umich.edu/~jblome/...jblomecases06.pdf Cached: PDF This document uses CoBlitz to cache paper downloads. If your firewall is blocking outgoing connections to port 3125, you can use these links to download local copies.
PS.gz PS Image Update HelpFrom: umich.edu/~jblome/pubs (more) (Enter author homepages) |
Rate this article:      (best)Comment on this article |
Abstract: Device scaling trends dramatically increase the susceptibility of microprocessors to soft errors. Further, mounting demand for embedded microprocessors in a wide array of safety critical applications, ranging from automobiles to pacemakers, compounds the importance of addressing the soft error problem. Historically, soft error tolerance techniques have been targeted mainly at high-end server markets, leading to solutions such as coarse-grained modular redundancy and redundant multithreading.... (Update)
Active bibliography (related documents): More All
1.2: A Microarchitectural Analysis of Soft Error.. - Blome, Mahlke.. (Correct)
0.6: Assessing SEU Vulnerability via Circuit-Level Timing.. - Constantinides.. (2005) (Correct)
0.5: Cost Reduction and Evaluation of a Temporary Faults.. - ANGHEL, NICOLAIDIS (2000) (Correct)
Similar documents based on text:
0.0: Unknown - (Correct)
BibTeX entry: (Update)
@misc{ blome-costefficient,
author = "Microprocessors Jason Blome",
title = "Cost-Efficient Soft Error Protection for Embedded",
url = "citeseer.ist.psu.edu/764646.html" }
Citations (may not include all citations):320 MediaBench: A tool for evaluating and synthesizing multimedi.. - Lee, Potkonjak et al. - 1997
52 Simplescalar: An infrastructure for computer system modeling (context) - Austin, Larson et al. - 2002
49 AR-SMT: A microarchitectural approach to fault tolerance in .. - Rotenberg - 1999
21 ARM Architecture Reference Manual (context) - Seal - 2000
14 Time redundancy based soft-error tolerance to rescue nanomet.. (context) - Nicolaidis - 1999
11 A systematic methodology to compute the architectural vulner.. (context) - Mukherjee, Weaver et al. - 2003
11 Technical Reference Manual (context) - Ltd, EJ-S - 2004
9 Parallel Enterprise Server G5 Fault Tolerance: A Historical .. (context) - Spainhower, Gregg - 1999
6 Soft error sensitivity characterization for microprocessor d.. (context) - Kim, Somani - 2002
3 Microprocessor sensitivity to failures: Control vs (context) - Saggese, Vetteth et al. - 2005
3 Characterizing the Effects of Transient Faults on a High-Per.. - Wang, Quek et al. - 2004
2 Making typical silicon matter with razor (context) - Austin, Blaauw et al. - 2004
2 line delay testing of digital circuits (context) - Franco, McCluskey - 1994
2 Transient fault detection via simulataneous multithreading (context) - Reinhardt, Mukherjee - 2000
2 A class of optimal minimum odd-weight-column sec-ded codes (context) - Hsiao - 1970
1 Nonstop Advanced Architecture (context) - Bernick, Bruckert et al. - 2005
1 A self-tuning dvs processor using delay-error detection and .. (context) - Das, Roberts et al. - 2006
1 Engineering over-clocking: Reliability-performance trade-off.. (context) - Memik, Chowdhury et al. - 2005
1 Terrestrial cosmic ray intensities (context) - Zeigler - 1998
Documents on the same site (http://www.eecs.umich.edu/~jblome/pubs.html): More
The Liberty Simulation Environment: A Deliberate - Approach To High-Level (Correct)
Jason Blome - Personal Information University (Correct)
The Liberty Simulation Environment, Version 1.0 - Manish Vachharajani Neil (Correct)
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC