by C. Morra, M. Sackmann, J. Becker, R. Hartenstein, Universitaet Karslsruhe
http://helios.informatik.uni-kl.de/Morra-ReCoSoC2006.pdf
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Abstract:
A novel toolflow based in rewriting-logic is used to automatically generate polynomial approximations for arbitrary continous functions. The simple but powerful semantics of rewriting logic provide a natural mechanism for manipulating algebraic expressions, allowing the development to be done on a higher abstraction level while avoiding the unnecessary semantics required in hardware description and programming languages. The resulting polynomial approximations are rewritten to generate alternative implementation approaches which are automatically converted into different functionally equivalent hardware implementations. The rewriting-logic toolflow can generate implementations for both fine- and coarse-grained architectures. This paper presents the implementation results for the Pact XPP coarsegrained reconfigurable architecture. 1.
Citations
|
114
|
Maude: Specification and programming in rewriting logic
– Clavel, Durán, et al.
- 2002
|
|
103
|
Elementary Functions, Algorithms and Implementation
– Muller
- 1997
|
|
73
|
A decade of reconfigurable computing: A visionary retrospective
– Hartenstein
- 2001
|
|
41
|
May/June). Using term rewriting systems to design and verify processors
– Arvind, Shen
- 1999
|
|
33
|
ELAN from a rewriting logic point of view
– Borovansk´y, Kirchner, et al.
|
|
23
|
Promoting rewriting to a programming language: A compiler for non-deterministic rewrite programs in associative-commutative theories
– Kirchner, Moreau
- 2001
|
|
15
|
Using an Induction Prover for Verifying Arithmetic Circuits
– Kapur, Subramaniam
- 2000
|
|
13
|
The Art of Computer Programming, 3rd ed
– Knuth
- 1997
|
|
11
|
DRESC: A Retargetable Compiler for Coarse-Grained Reconfigurable Architectures
– Mei, Vernalde, et al.
- 2002
|
|
9
|
Coarse-grained reconfigurable architectures design space exploration
– Nageldinger
- 2001
|
|
8
|
KressArray Xplorer: A new CAD environment to optimize reconfigurable datapath array architectures
– Hartenstein, Hertz, et al.
- 2000
|
|
7
|
XPP-VC: A C Compiler with Temporal Partitioning for the PACT-XPP Architecture
– Cardoso, Weinhardt
- 2002
|
|
7
|
Modeling a reconfigurable system for computing the FFT in place via rewriting-logic
– Ayala-Rincon, Nogueira, et al.
- 2003
|
|
7
|
Logical foundations of CafeOBJ
– Diaconescu, Futatsugi
- 2002
|
|
5
|
Modeling and prototyping dynamically reconfigurable systems for efficient computation of dynamic programming methods by rewriting-logic
– Ayala-Rincon, Jacobi, et al.
- 2004
|
|
5
|
FELIX: Using rewriting-logic for generating functionally equivalent implementations
– Morra, Becker, et al.
- 2005
|
|
2
|
Special issue on Rewriting Logic and its
– Marti-Oliet, Meseguer, et al.
|
|
2
|
Computer Arithmetic Synthesis Technologies on reconfigurable platforms
– Tsoi
- 2005
|
|
1
|
PACT XPP - a self-reconfigurable data architecture
– Baumgarten, Ehlers, et al.
- 2003
|
|
1
|
Verification of rewrite based specifications using proof assistants
– Sant’Ana, Ayala-Rincon
|
