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Abstract: Advances in FPGA technology have led to dramatic improvements in double precision floating-point performance. Modern FPGAs boast several GigaFLOPs of raw computing power. Unfortunately, this computing power is distributed across 30 floating-point units with over 10 cycles of latency each. The user must find two orders of magnitude more parallelism than is typically exploited in a single microprocessor; thus, it is not clear that the computational power of FPGAs can be exploited across a wide... (Update)
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BibTeX entry: (Update)
@misc{ keith-analysis,
author = "Scott Hemmert Keith",
title = "An Analysis of the Double-Precision Floating-Point FFT on FPGAs",
url = "citeseer.ist.psu.edu/749104.html" }
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