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Hybrid Transactional Memory  (Make Corrections)  
Sanjeev Kumar Michael Chu Christopher J. Hughes Partha Kundu Anthony Nguyen...



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Abstract: High performance parallel programs are currently difficult to write and debug. One major source of difficulty is protecting concurrent accesses to shared data with an appropriate synchronization mechanism. Locks are the most common mechanism but they have a number of disadvantages, including possibly unnecessary serialization, and possible deadlock. Transactional memory is an alternative mechanism that makes parallel programming easier. With transactional memory, a transaction provides atomic... (Update)

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BibTeX entry:   (Update)

@misc{ michael-hybrid,
  author = "Sanjeev Kumar Michael",
  title = "Hybrid Transactional Memory",
  url = "citeseer.ist.psu.edu/748938.html" }
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79   Removing architectural bottlenecks to the scalability of spe.. - Prvulovic, Garzaran et al. - 2001  ACM   DBLP
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3   Tradeoffs in buffering memory state for thread-level specula.. (context) - Garzaran, Prvulovic et al. - 2003  ACM   DBLP
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1   PLDI'05 Keynote Address (context) - Herlihy - 2005
1   Transactional Memory Bibliography (context) - Rajwar, Hill et al. - 2005

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