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BEAM: Bus Encoding Based on Instruction-Set-Aware Memories  (Make Corrections)  
Yazdan Aghaghiri 3740 McClintock Ave Los Angeles, CA 90089 Tel: 213-740-4437...



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Abstract: This paper introduces a new approach for minimizing power dissipation on the memory address bus. The proposed approach relies on the availability of smart memories that have certain awareness of the instruction format of one or more architectures. Based on this knowledge, the memory calculates or predicts the instruction and data addresses. Hence, not all addresses are sent from the processor to the memory. This, in turn, significantly reduces the activity on the memory bus. The proposed method ... (Update)

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BibTeX entry:   (Update)

@misc{ mcclintock-beam,
  author = "Yazdan Aghaghiri Mcclintock",
  title = "BEAM: Bus Encoding Based on Instruction-Set-Aware Memories",
  url = "citeseer.ist.psu.edu/746836.html" }
Citations (may not include all citations):
241   A Study of Branch Prediction Strategies (context) - Smith - 1981
75   Computer Architecture (context) - Patterson - 1996
47   Asymptotic Zero-Transition Activity Encoding for Address Bus.. (context) - Benini, DeMicheli et al. - 1997
38   Target prediction for indirect jumps - Chang, Hao et al. - 1997
33   Exploiting the locality of memory references to reduce the a.. - Musoll, Lang et al. - 1997
27   System-Level Power Optimization of Special Purpose Applicati.. (context) - Benini, DeMichelli et al. - 1997
8   Power Optimization of System-Level Address Buses Based on So.. - Fornaciari, Polentarutti et al. - 2000
8   Bus Energy Minimization by Transition Pattern Coding (context) - Sotiriadis, Chandrakasan - 2000
8   Irredundant Address Bus Encoding for Low Power (context) - Aghaghiri, Fallah et al. - 2001
5   Bus Encoding for Low-Power HighPerformance Memory Systems - Chang, Kim et al. - 2000
4   Bus Data Coding with Zero Suppression for Low Power Chip Int.. (context) - Ikeda, Asada - 1996
3   Low-energy for Deepsubmicron Address Buses (context) - Macchiarulo, Macii et al. - 2001
3   A Coding Framework for Low-Power Address and Data Buses (context) - Ramprasad, Shanbhag et al. - 1999
1   PartialBus-InvertCodingforPower Optimization of System Level.. (context) - Shin, Chae et al. - 1998
1   Sigal Coding for Low Power: Fundamental Limits and Practical.. (context) - Ramprasad, Shanbhag et al. - 1999
1   POSE: Power Optimization and Synthesis Enviroment (context) - Iman, Pedram - 1996
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