(Enter summary)
Abstract: New and emerging applications can change the mix of
operations commonly used within computer architectures.
It is sometimes surprising when instruction-set architecture
(ISA) innovations intended for one purpose are used for
other (initially unintended) purposes. This paper considers
recent proposals for the processor support of families
of bit-level permutations. From a processor architecture
point of view, the ability to support very fast bit-level permutations
may be viewed as a further... (Update)
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BibTeX entry: (Update)
R. B. Lee, R. L. Rivest, M. J. B. Robshaw, Z. J. Shi, and Y. L. Yin, "Permutation operations in cipher design," in Proc. Intl. Conf. on Information Technology (ITCC)s, Apr. 2004. http://citeseer.ist.psu.edu/article/lee04permutation.html More
@misc{ lee04permutation,
author = "R. Lee and R. Rivest and M. Robshaw and Z. Shi and Y. Yin",
title = "Permutation operations in cipher design",
text = "R. B. Lee, R. L. Rivest, M. J. B. Robshaw, Z. J. Shi, and Y. L. Yin, Permutation
operations in cipher design, in Proc. Intl. Conf. on Information Technology
(ITCC)s, Apr. 2004.",
year = "2004",
url = "citeseer.ist.psu.edu/article/lee04permutation.html" }
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