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Transistor Chaining with Integrated Dynamic Folding (2001)  (Make Corrections)  
for 1-D Leaf Cell Synthesis Krzysztof S. Berezowski Wrocl/aw University of...



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Abstract: In this paper, a new method of transistor chaining for 1-D automatic leaf cell synthesis is presented. The method allows synthesis of cells suitable for row-based layouts with no restrictions imposed on network topologies/transistor sizes. The novelty of the solution arises from transistor chaining with integrated dynamic transistor folding. We provide the theoretical analysis of transistor folding, then formulate the problem and solve it using the computational model made after that of [1].... (Update)

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BibTeX entry:   (Update)

@misc{ cell-transistor,
  author = "For Leaf Cell",
  title = "Transistor Chaining with Integrated Dynamic Folding",
  url = "citeseer.ist.psu.edu/743338.html" }
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