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Abstract: Thread-level speculation (TLS) has proven to be a promising method of extracting parallelism from both integer and scientific workloads, targeting speculative threads that range in size from hundreds to several thousand dynamic instructions and have minimal dependences between them. Recent work has shown that TLS can offer compelling performance improvements for database workloads, but only when targeting much larger speculative threads of more than 50,000 dynamic instructions per thread, with... (Update)
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BibTeX entry: (Update)
@misc{ anastassia-tolerating,
author = "Christopher Colohan Anastassia",
title = "Tolerating Dependences Between Large Speculative Threads Via Sub-Threads",
url = "citeseer.ist.psu.edu/742656.html" }
Citations (may not include all citations):269 Multiscalar processors - Sohi, Breach et al. - 1995 ACM DBLP
136 superscalar microprocessor (context) - Yeager - 1996
102 Dynamic speculation and synchronization of data dependences - Moshovos, Breach et al. - 1997 ACM DBLP
79 Removing architectural bottlenecks to the scalability of spe.. - Prvulovic, an et al. - 2001 ACM DBLP
74 Speculative versioning cache - Gopal, Vijaykumar et al. - 1998 ACM DBLP
38 A scalable approach to thread-level speculation - Steffan, Colohan et al. - 2000 ACM DBLP
38 Architectural Support for Scalable Speculative Parallelizati.. - Cintra, nez et al. - 2000
25 Compiling for the Multiscalar Architecture - Vijaykumar - 1998 ACM
20 MAJC: Microprocessor architecture for java computing (context) - Tremblay - 1999
12 Hardware for Speculative Parallelization of Partially-Parall.. - Zhang, Rauchwerger et al. - 1999 ACM DBLP
11 Checkpoint processing and recovery: Towards scalable large i.. (context) - Akkary, Rajwar et al. - 2003
10 Improving value communication for thread-level speculation - Steffan, Colohan et al. - 2002 ACM DBLP
10 Compiler Optimization of Scalar Value Communication Between .. - Zhai, Colohan et al. - 2002 ACM DBLP
9 Transactional memory coherence and consistency (context) - Hammond, Wong et al. - 2004 ACM
6 Programming with transactional coherence and consistency (context) - Hammond, Carlstrom et al. - 2004
6 The Benchmark Handbook for Transaction Processing Systems (context) - Gray - 1993
5 Using thread-level speculation to simplify manual paralleliz.. - Prabhu, Olukotun - 2003 ACM DBLP
5 Eliminating Squashes Through Learning Cross-Thread Violation.. - Cintra, Torrellas - 2002 ACM
5 IEEE Micro Magazine (context) - Hammond, Hubbert et al. - 2000
4 Cherry: Checkpointed early resource recycling in out-of-orde.. (context) - nez, Renau et al. - 2002 DBLP
4 Computer Architecture Support for Database Applications - Keeton - 1999 ACM
2 Extending Thread Level Speculation Hardware Support to Large.. (context) - Colohan, Ailamaki et al. - 2005
2 Out-of-order commit processors (context) - Cristal, Ortega et al. - 2004 DBLP
1 Multithreaded value prediction (context) - Tuck, Tullsen - 2005
1 Improving cache locality for thread-level speculation - Fung, Steffan - 2006
1 Tradeoffs in buffering memory state for thread-level specula.. (context) - an, Prvulovic et al. - 2003 ACM DBLP
1 Optimistic Intra-Transaction Parallelism on Chip Multiproces.. (context) - Colohan, Ailamaki et al. - 2005
1 Reslice: Selective re-execution of long-retired misspeculate.. (context) - Sarangi, Liu et al. - 2005
1 Improving preemptive prioritization via statistical characte.. (context) - McWherter, Schroeder et al. - 2005
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