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Abstract: Traditional approaches for sequential logic optimization include (1) explicit state-based techniques such as state minimization, (2) structural techniques such as retiming, and (3) methods that exploit sequential don't-cares derived from unreachable states. These approaches optimize a logic circuit as a single component with a single input/output behavior. In this paper we present a novel concept for sequential optimization referred to as temporal decomposition, which distinguishes the logic... (Update)
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BibTeX entry: (Update)
@misc{ andreas-temporal,
author = "Nathan Kitchen Andreas",
title = "Temporal Decomposition for Logic Optimization",
url = "citeseer.ist.psu.edu/737806.html" }
Citations (may not include all citations):372 SIS: A system for sequential circuit synthesis - Sentovich, Singh et al. - 1992
296 Logic Minimization Algorithms for VLSI Synthesis (context) - Brayton, Hachtel et al. - 1984
207 Retiming synchronous circuitry (context) - Leiserson, Saxe - 1991
106 Optimizing synchronous systems (context) - Leiserson, Saxe - 1983
38 Clock skew optimization (context) - Fishburn - 1990
26 Checking safety properties using induction and a SAT-solver (context) - Sheeran, Singh et al. - 2000
25 A method for minimizing the number of internal states in inc.. (context) - Grasselli, Luccio - 1965
24 Don't care minimization of multi-level sequential logic netw.. (context) - Lin, Touati et al. - 1990
10 Managing power and performance for system-on-chip designs us.. (context) - Lackey, Zuchowski et al. - 2002
5 Dynamic transition relation simplification for bounded prope.. - Kuehlmann - 2004
4 An extensible SAT-solver (context) - en, orensson - 2003
1 Don't-care computation using k-clause approximation (context) - McMillan - 2005
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