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Abstract: Logic-level simulation is still one of the most often used operations on digital designs during both design and test stages. This makes it a critical issue affecting the overall cost of a project. In this paper we investigate and show the origins of common advantages of four recently proposed efficient simulation methods of different classes: logic simulation, multi-valued simulation, timing simulation, and fault simulation. Described advantages became possible due to use of a highly efficient... (Update)
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BibTeX entry: (Update)
@misc{ international-unknown,
author = "Proc Rd International",
title = "Unknown",
url = "citeseer.ist.psu.edu/736137.html" }
Citations (may not include all citations):1726 Graph-based algorithms for Boolean function manipulation - Bryant - 1986
308 Digital Systems Testing and Testable Design (context) - Abramovici, Breuer et al. - 1999
29 Test Synthesis with Alternative Graphs (context) - Ubar - 1996
19 Test Generation for Digital Circuits Using Alternative Graph.. (context) - Ubar - 1976
5 Multi-Valued Simulation of Digital Circuits with Structurall.. (context) - Ubar - 1998
3 Recent Advances in BDD Based Representations for Boolean Fun.. (context) - Narayan - 1999
3 Beschreibung Digitaler Einrichtungen mit Alternativen Graphe.. (context) - Ubar - 1980
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