Zvi Terem, Gila Kamhi, Moshe Y. Vardi*, Amitai Irron Logic Validation...  Home/Search
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Abstract: The main focus of this paper is on using algorithms for design pattern matching to address the challenges of designs at RT and higher abstraction levels. The crux of our approach is modeling designs and patterns as graphs, which lets us express design pattern matching as subgraph isomorphism. We apply a constraintsatisfaction approach and address the problem of both exact and generalized matching. Our experimental results confirm the applicability of our approach on industrial test cases. (Update)
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BibTeX entry: (Update)
@misc{ gila-pattern,
author = "Zvi Terem Gila",
title = "Pattern Search in Hierarchical High-Level Designs",
url = "citeseer.ist.psu.edu/733877.html" }
Citations (may not include all citations):4212 Computers and Intractability: A Guide to the Theory of NP-co.. (context) - Garey, Johnson - 1979
99 Minimizing Power Consumption in Digital CMOS Circuits (context) - Chandrakasan, Brodersen - 1995
86 DAGON: Technology Binding and Local Optimization by DAG Matc.. (context) - Keutzer - 1987
31 An algorithm for sub-graph isomorphism (context) - Ullman - 1976
28 Constraint Processing (context) - Dechter - 2003
21 High-Level Synthesis (context) - Dutt, Lin
9 Validating VLSI Circuit Layout by Wirelist Comparison (context) - Ebeling, Zajicek
5 SubGemini: Identifying Sub-Circuits Using a Fast Subgraph Is.. (context) - Ohlrich, Ebeling et al. - 1993
4 Graph Pattern Matching using Constraint Satisfaction (context) - Larrosa, Valiente - 2000
2 Identifying High-Level Components in Combinational Circuits - Doom, White et al.
1 Reducing Power Dissipation by Structural Transformations (context) - Rohfleisch, Kolbl et al. - 1996
1 Netlist Processing for Custom VLSI via Pattern Matching - Chanak - 1995
1 LOGEX -- An Automatic Logic Extraction from Transistor to Ga.. (context) - Boehner - 1988
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