Sddka Berna Örs, Lejla Batina, Bart Preneel, Joos Vandewalle  Home/Search
Context
Related
| esat.kuleuven.ac.be/~...SBO0302.pdf.gz Cached: PS.gz PS PDF This document uses CoBlitz to cache paper downloads. If your firewall is blocking outgoing connections to port 3125, you can use these links to download local copies.
Image Update HelpPS.gz PS PDF From: homes.esat.kuleuven.be/~sbors/ (more) (Enter author homepages) |
Rate this article:      (best)Comment on this article |
Abstract: This paper describes a hardware architecture for modular multiplication operation which is efficient for bit-lengths suitable for both commonly used types of Public Key Cryptography (PKC) i.e. ECC and RSA Cryptosystems. The challenge of current PKC implementations is to deal with long numbers (160-2048 bits) in order to achieve system's efficiency, as well as security. RSA, still the most popular PKC, has at its root the modular exponentiation operation. Modular exponentiation consists of... (Update)
Similar documents (at the sentence level):
22.5%: Hardware Implementation of Elliptic Curve Processor over GF(p) - Örs, Batina, Preneel (Correct)
Active bibliography (related documents): More All
0.8: An FPGA Implementation of a Montgomery Multiplier over.. - Mentens, Örs, Preneel.. (Correct)
0.6: Accelerating the Secure Remote Password Protocol.. - Groen.. (2004) (Correct)
0.5: Hardware Implementation of an Elliptic Curve Processor.. - Örs, Batina, Preneel.. (2002) (Correct)
Similar documents based on text: More All
0.3: Power-Analysis Attacks on an FPGA - First Experimental Results - Örs, Oswald, Preneel (Correct)
0.3: Linear Cryptanalysis of Reduced-Round Versions of.. -.. (Correct)
0.3: An FPGA Implementation of an Elliptic Curve Processor over.. - Mentens, Örs, al. (2004) (Correct)
BibTeX entry: (Update)
@misc{ rs-hardware,
author = "Sddka Berna Örs and Lejla Batina and Bart Preneel and Joos Vandewalle",
title = "Hardware Implementation of a Montgomery Modular Multiplier in a Systolic
Array",
url = "citeseer.ist.psu.edu/731336.html" }
Citations (may not include all citations):1529 A method for obtaining digital signatures and public-key cry.. - Rivest, Shamir et al. - 1978
1065 Handbook of Applied Cryptography (context) - Menezes, van Oorschot et al. - 1997
428 IEEE Transactions on Information Theory (context) - Diffie, Hellman et al. - 1976
257 Elliptic curve cryptosystem (context) - Koblitz - 1987
228 Uses of elliptic curves in cryptography (context) - Miller - 1985
135 Modular multiplication without trial division (context) - Montgomery - 1985
25 Hardware implementation of Montgomery's modular multiplicati.. (context) - Eldridge, Walter
17 Montgomery modular exponentiation on reconfigurable hardware - Blum, Paar - 1999
14 Simplifying quotient determination in high-radix modular mul.. (context) - Orup - 1995
10 Systolic modular multiplication (context) - Even - 1990
6 A scalable and unified multiplier architecture for finite fi.. (context) - Savas, Tenca et al.
6 High-radix Montgomery modular exponentiation on reconfigurab.. - Blum, Paar - 2001
5 linear-array multiplier for a class of right-shift algorithm.. (context) - Kornerup, systolic - 1994
4 Montgomery modular multiplication method and systolic arrays.. (context) - Iwamura, Matsumoto et al. - 1994
4 Upper Saddle River (context) - Mano, Kime et al. - 2001
4 Hardware architectures for public key cryptography (context) - Batina, Ors et al. - 2002
4 Hardware implementation of an elliptic curve processor over .. - Ors, Batina et al. - 2002
3 Modular exponent realization on FPGAs (context) - Poldre, Tammemae et al. - 1998
3 Performance-scalable array architectures for modular multipl.. (context) - Freking, Parhi - 2000
2 Optimised bit serial modular multiplier for implementation o.. (context) - Marnane - 1998
2 High-speed implementation methods for RSA scheme (context) - Iwamura, Matsumoto et al. - 1992
2 Implementation of 1024-bit modular processor for RSA cryptos.. (context) - Kim, Kang et al. - 2000
2 Montgomery in practice: How to do it more efficiently in har.. (context) - Batina, Muurling - 2002
2 Systolic-arrays for modular exponentiation using Montgomery .. (context) - Iwamura, Matsumoto et al. - 1992
Documents on the same site (http://homes.esat.kuleuven.be/~sbors/): More
Modeling n × n Bit Multiplication Blocks for DSP.. - Örs, Dervisoglu (Correct)
An FPGA Implementation of a Montgomery Multiplier over.. - Mentens, Örs, Preneel.. (Correct)
Hardware Implementation of an Elliptic Curve Processor.. - Örs, Batina, Preneel.. (2002) (Correct)
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC