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Abstract: A problem with bus-based shared-memory multiprocessors is that the shared bus rapidly becomes a bottleneck in the machine, effectively limiting the machine size to somewhere between ten and twenty processors. We propose a new architecture, the Bus-Based COMA (BB-COMA) that addresses this problem. Compared to the standard UMA architecture, the BB-COMA has lower requirements on bus bandwidth. We have used program-driven simulation to study the two architectures running applications from the... (Update)
Context of citations to this paper: More
...much of the potential performance benefits offered by the COMA over NUMA and UMA systems. The effects of this has been studied in [11, 2]. 2.1. Shared attraction memories Depending on the behavior of the application program, we can expect either improvements or...
...in the system, to avoid loss of data, the line must be relocated to some other AM that has space for it. Bus based COMA [LQK94, LK95, LD96] can solve the problem by using the broadcasting feature of the bus [CKL99] However, use of such bus is expensive and not scalable. In...
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10: DDM -- A Cache-Only Memory Architecture - Hagersten, Landin et al. - 1992
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BibTeX entry: (Update)
A. Landin and F. Dahlgren. Bus-Based COMA -- Reducing Traffic in Shared-Bus Multiprocessors. In Proceedings of the 2nd International Symposium on High-Performance Computer Architecture, pages 95-- 105, February 1996. http://citeseer.ist.psu.edu/729191.html More
@inproceedings{ landin96busbased,
author = "A. Landin and F. Dahlgren",
title = "Bus-based {COMA}: Reducing Traffic in Shared-bus Multiprocessors",
booktitle = "Proc. of the 2nd {IEEE} Symp. on High-Performance Computer Architecture ({HPCA}-2)",
year = "1996",
url = "citeseer.ist.psu.edu/729191.html" }
Citations (may not include all citations):496 SPLASH: Stanford Parallel Applications for Shared-Memory (context) - Singh, Weber et al. - 1992
249 Tolerating Latency Through Software Controlled Data Prefetch.. - Mowry - 1994
145 DDM - A CacheOnly Memory Architecture - Hagersten, Landin et al. - 1992
92 Performance Evaluation of Memory Consistency Models for Shar.. - Gharachorloo, Gupta et al. - 1991
82 A Low Overhead Coherence Solution for Multiprocessors with P.. (context) - Papamarcos, Patel - 1984
57 An Argument for Simple COMA - Saulsbury, Wilkinson et al. - 1995
48 Evaluating the Performance of Four Snooping Cache Coherence .. (context) - Eggers, Katz - 1989
41 The CacheMire Test Bench --- A Flexible and Effective Approa.. (context) - Brorsson, Dahlgren et al. - 1993
39 Toward Scalable Cache-Only Memory Architectures - Hagersten - 1992
32 Data Diffusion Machine - a Scalable Shared Virtual Memory Mu.. (context) - Warren, Haridi - 1988
29 Evaluating the Memory Overhead Required for COMA Architectur.. (context) - Joe, Hennessy - 1994
15 Comparative Performance Evaluation of Cache-Coherent NUMA an.. (context) - Stenstrm, Joe et al. - 1992
12 Performance Optimizations, Implementation, and Verification .. (context) - Galles, Williams - 1994
12 Boosting the Performance of Hybrid Snooping Cache Protocols (context) - Dahlgren - 1995
10 Simple Compiler Algorithms to Reduce Ownership Overhead in C.. (context) - Skeppstedt, Stenstrm - 1994
8 An Assessment of COMA Multiprocessors (context) - Lee - 1995
6 Reducing the Replacement Overhead in Bus-based COMA Multipro.. - Dahlgren, Landin - 1995
3 COMA-F: A Non-Hierarchical Cache-Only Memory Architecture (context) - Joe - 1995
3 Protocol Mapping in Bus Based COMA Multiprocessors - Quattlebaum, Lee et al. - 1994
2 SiCO - a Simple COMA Implementation (context) - Saulsbury, Carter et al. - 1995
1 Personal correspondence (context) - Lee - 1995
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