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Abstract: this article, or one that has not yet been discovered, the future for interesting architectures has never been more open (Update)
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BibTeX entry: (Update)
@misc{ there-ieee,
author = "Billion-Transistor Architectures There",
title = "IEEE 22 Computer",
url = "citeseer.ist.psu.edu/702039.html" }
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76 Will Physical Scalability Sabotage Performance Gains - Matzke - 1997
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57 A Bandwidth-Efficient Architecture for Media Processing - Rixner - 1998
54 Scalable Processors in the Billion -Transistor Era: IRAM - Kozyrakis - 1997
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23 Mondrian Memory Protection - Witchel, Cates et al. - 2002
21 Billion-Transistor Architectures - Burger, Goodman - 1997
19 Speculative Lock Elision: Enabling Highly Concurrent Multith.. - Rajwar, Goodman - 2001
16 Walk-Time Techniques: Catalyst for Architectural Change (context) - Fisher - 1997
16 Transactional LockFree Execution of Lock-Based Programs - Rajwar, Goodman - 2002
15 One Billion Transistors, One Uniprocessor, One Chip (context) - Patt - 1997
12 Superspeculative Microarchitecture for Beyond AD 2000 - Lipasti, Shen - 1997
10 The Optimum Pipeline Depth for a Microprocessor (context) - Hartstein, Puzak - 2002
10 Simultaneous Subordinate Microthreading (SSMT - Chappell - 1999
7 Master/Slave Speculative Parallelization (context) - Zilles, Sohi - 2002
6 The Optimal Logic Depth Per Pipeline Stage Is 6 to 8 FO4 Inv.. (context) - Hrishikesh - 2002
3 Razor: A Low-Power Pipeline Based on Circuit-Level Timing Sp.. (context) - Ernst - 2003
1 Computer Systems Laboratory (context) - Dally, Hanrahan et al. - 2001
1 A Study of Slipsteam Processors (context) - Purser, Sundaramoorthy et al. - 2000
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