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  Efficient Methodology and Semi-automated Flow for Design and (2003) [3 citations — 0 self]

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by L. Tambour, N. Zergainoh, P. Urard, H. Michel, A. A. Jerraya
Validation of Complex DSP ASIC Macro-Cells.”, 14 th IEEE RSP
http://tima.imag.fr/sls/documents/029_Zergainoh_version_finale.pdf
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Abstract:

We present a methodology and design flow for signal processing application specific integrated circuit macro-cells. The key features of the methodology are the mastering the complexity of design, the increasing of reuse factor and the early error detection. It takes advantages of a derivative designs, a signal processing modularity, generic modeling and combines both levels of abstraction, in order to produce an efficient architecture. The flow includes a fast verification platform that drives both algorithm and architecture validation in an efficient way. We illustrate the effectiveness of the proposed methodology by a significant industrial application. Experimental design results indicate strong advantages of the proposed schemes. 1

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