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  HOLMES: Capturing the Yield–Optimized Design Space Boundaries of Analog and RF Integrated Circuits

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by Bart De Smedt, Georges Gielen
http://www.sigda.org/Archives/ProceedingArchives/Date/papers/2003/date03/htmfiles/sun_sgi/frames/../../../pdffiles/03f_4.pdf
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Abstract:

A novel methodology is presented to structured yield– aware synthesis. The trade–off between yield and the unspecified performances is explored along the design space boundaries, while respecting specifications on the other performances. Through the unique combination of multi–objective evolutionary optimization techniques, multi–variate regression modeling and sensitivity–based yield estimation, the designer is given access to this trade–off, all within transistor–level accuracy. Even more, a large reduction in required computer resources is obtained compared to alternative approaches. 1

Citations

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