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Abstract: Developments in VLSI technologies create the possibility of hosting several independent (sub) systems in a single chip. There is a need to share a number of resources, especially off-chip resources, which creates new constraints in the design process. Although performance is still a key constraint, sharing implies that secure access to those resources and QoS guarantees are needed. In this paper, an architecture is presented that achieves the goals listed above. The Embedded Hardware Manager... (Update)
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BibTeX entry: (Update)
@misc{ macian-beyond,
author = "Carlos Macian et al.",
title = "Beyond Performance: Secure and Fair Memory Management for Multiple Systems
on a Chip",
url = "citeseer.ist.psu.edu/689202.html" }
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