See this document in CiteSeerX!

Verification of loop transformations for complex data dominated  (Make Corrections)  
applications. Cupak, F. Catthoor Dept. of Microelectronics, STU, Ilkovicova...



  Home/Search   Context   Related

 
View or download:
imec.be/design/dtse/pdf/Cup97.pdf
Cached:  PDF   PS.gz  PS  Image  Update  Help

From:  imec.be/design/...lications.shtml (more)
(Enter author homepages)

Rate this article: (best)
  Comment on this article  
(Enter summary)

Abstract: This paper presents new results for formal verification of loop transformations applied on complex applications in the area of speech, image and video processing, front-end telecom and numerical computing systems. (Update)

Similar documents (at the sentence level):
13.7%:   Functional Validation of System-level Loop.. - Cupák, Kulkarni..   (Correct)

Active bibliography (related documents):   More   All
0.7:   Verification of Loop Transformations for Real Time.. - Samsom, Franssen.. (1994)   (Correct)
0.4:   From VHDL to Efficient and First-Time-Right Designs: A Formal.. - Middelhoek (1995)   (Correct)
0.3:   Corollary 4.2 - Given Realizable   (Correct)

Similar documents based on text:   More   All
0.3:   Formalized Three-Layer System-Level Reuse Model.. - Vermeulen.. (2000)   (Correct)
0.2:   Low power data transfer and storage exploration.. - Nachtergaele.. (1997)   (Correct)
0.2:   Platform Independent Data Transfer and Storage.. - Danckaert, Catthoor.. (1999)   (Correct)

BibTeX entry:   (Update)

@misc{ catthoor-verification,
  author = "Applications Cupak Catthoor",
  title = "Verification of Loop Transformations for Complex Data Dominated",
  url = "citeseer.ist.psu.edu/670686.html" }
Citations (may not include all citations):
245   The Omega Test: a fast and practical integer programming alg.. - Pugh - 1991
87   Loop Transformations for Restructuring Compilers: the Founda.. (context) - Banerjee - 1993
53   Binary decision diagrams and beyond: enabling technologies f.. - Bryant - 1995
15   Formal analysis of correctness of behavioral transformations (context) - McFarland - 1993
14   Formal verification of sequential hardware: a tutorial (context) - McFarland - 1993
14   Formal System Design Interactive Synthesis based on Computer.. (context) - Finn, Fourman et al. - 1989
10   Verification of loop transformations for real time signal pr.. - Samsom, Franssen et al. - 1994
8   Automating high-level control flow transformations for DSP m.. - van Swaaij, Franssen et al. - 1992
5   Illustration of the SFG-tracing multi-level behavioral verif.. (context) - Genoe, Claesen et al. - 1991
4   Formal verification and transformation of video and image pr.. (context) - Samsom - 1995
4   Multi-dimensional interleaving for time-and-memory design op.. - Passos, Sha et al. - 1995
3   Formal specification and verification of microprocessor syst.. (context) - Joyce - 1989
3   Mentor Graphics Corporation (context) - DFL
2   Formal verification of hardware correctness (context) - Camurati, Prinetto - 1988
http://www.nta.no/brukere/DVC/h263

Documents on the same site (http://www.imec.be/design/dtse/publications.shtml):   More
Application of High-Level Memory Size Estimation for.. - Kjeldsberg, Catthoor.. (2000)   (Correct)
Automated Data Dependency Size Estimation with a.. - Kjeldsberg, Catthoor.. (2000)   (Correct)
Low Power Storage for Hierarchical Graphs - Brockmeyer, Wuytack.. (2000)   (Correct)

Online articles have much greater impact   More about CiteSeer.IST   Add search form to your site   Submit documents   Feedback  

CiteSeer.IST - Copyright Penn State and NEC