See this document in CiteSeerX!

Tiling and memory reuse for sequences of nested loops Youcef Bouchebaba and Fabien Coelho  (Make Corrections)  
Centre de Recherche en Informatique Ecolde des Mines de Paris 35, Rue Saint...
Proceedings of the 8th International Euro-Par Conference on Parallel Processing



  Home/Search   Context   Related

 
View or download:
cri.ensmp.fr/classement/doc/A342.ps
Cached:  PS.gz  PS  PDF   Image  Update  Help

From:  cri.ensmp.fr/classement/doc/ (more)
(Enter author homepages)

Rate this article: (best)
  Comment on this article  
(Enter summary)

Abstract: In this paper we show how to combine loop fusion, loop permutation, tiling and loop shifting to a sequence of nested loops. Each of these nests uses a stencil of data produced in the previous nest and the references to the same array are equal, up to a shift. Consequently, the dependences are uniform. Our method shifts the iteration domain of each nest to ensure that the application of fusion with tiling valid. To increase data locality, we propose a new method that replaces the array... (Update)

Active bibliography (related documents):   More   All
0.3:   Loop Shifting for Loop Parallelization - Darte, Huard (2000)   (Correct)
0.3:   Loop Shifting for Loop Compaction - Darte, Huard (1999)   (Correct)
0.2:   Storage Size Reduction by In-place Mapping of Arrays - Tronçon.. (2002)   (Correct)

Similar documents based on text:
0.8:   Bu ered Tiling for Sequences of Loop Nests - Youcef Bouchebaba And   (Correct)
0.4:   Workshop "Compilation et Parallélisation Automatique" - Mongenet, Rajopadhye.. (1999)   (Correct)

BibTeX entry:   (Update)

@inproceedings{ 700472,
 author = {Youcef Bouchebaba and Fabien Coelho},
 title = {Tiling and Memory Reuse for Sequences of Nested Loops},
 booktitle = {Proceedings of the 8th International Euro-Par Conference on Parallel Processing},
 year = {2002},
 isbn = {3-540-44049-6},
 pages = {255--264},
 publisher = {Springer-Verlag},
 url = {citeseer.ist.psu.edu/658936.html} }
Citations (may not include all citations):
352   Supercompilers for parallel and vector computers (context) - Zima, Chapman - 1990
216   Strategies for cache and local memory management by global p.. (context) - Gannon, Jalby et al. - 1988
178   Supernode partitioning (context) - Irigoin, Triolet - 1988
79   Combining loop transformations considering caches and schedu.. (context) - Wolf, Maydan - 1998
71   Improving locality and parallelism in nested loops (context) - Wolf - 1992
44   A strategy for array management in local memory - Eisenbeis, Jalby et al. - 1990
23   the complexity of loop fusion - Darte - 2000
22   On tiling as a loop transformation - Xue - 1997
21   Iteration space slicing for locality (context) - Pugh, Rosser - 1999
8   Optimizing memory usage in the polyhedral model (context) - Quiller, Rajopadhye - 2000
3   Loop shifting for loop compaction - Darte, Huard - 2000
1   ered tiling for sequences of loops nests (context) - Bouchebaba, Coelho - 2001
1   IEEE Transactions on Parallel and Distributed Computing (context) - Manjikian, SS et al. - 1997
1   Pavage pour une sequence de nids de boucles (context) - Bouchebaba, Coelho - 2000
http://www.cri.ensmp.fr/pips

Documents on the same site (http://www.cri.ensmp.fr/classement/doc/):   More
From Machine Scheduling to VLIW Instruction Scheduling - Benot Dupont De   (Correct)
Optimization of Array Bound Checking - Nga (2000)   (Correct)
A Categorization Method for French Legal Documents - On The Web   (Correct)

Online articles have much greater impact   More about CiteSeer.IST   Add search form to your site   Submit documents   Feedback  

CiteSeer.IST - Copyright Penn State and NEC