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Abstract: Reconfigurable processors pose unique problems for program safety because of their use of computational approaches that are difficult to integrate into traditional program analyses. The combination of proof-carrying code for verification of standard processor machine code and model-checking for array configurations is explored. This combination extends proof-carrying code to provide a context for model checking, but uses standard model checking technology. (Update)
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BibTeX entry: (Update)
@misc{ cochran-model,
author = "John Cochran and Deepak Kapur and Darko Stefanovic",
title = "Model Checking Reconfigurable Processor Configurations for Safety Properties",
url = "citeseer.ist.psu.edu/631144.html" }
Citations (may not include all citations):828 Model Checking - Clarke, Grumberg et al. - 1999
566 Proof-carrying code - Necula - 1997
510 Symbolic Boolean manipulation with ordered binary-decision d.. - Bryant - 1992
176 Garp: A MIPS processor with a reconfigurable coprocessor - Hauser, Wawrzynek - 1997
66 Smashing the stack for fun and profit (context) - One - 1996
29 Buffer overflows: Attacks and defenses for the vulnerability.. (context) - Cowan, Wagle et al. - 2000
25 Department of Electrical Engineering and Computer Science (context) - Hauser, Architecture et al. - 1997
23 Compiling with Proofs - Necula - 1998
15 A Quantitative Approach to the Formal Verification of Real-T.. (context) - Campos - 1996
4 Safe untrusted agents using proof-carrying code - Necula, Lee - 1997
4 Temporal logic for proof-carrying code (context) - Bernard, Lee - 2002
4 Mathematical Logic and Hilbert's e-symbol (context) - Leisenring - 1969
1 ITC-IRST and CMU (context) - Cimatti, Roveri et al. - 1998
1 Towards provably safe reconfigurable processor code: A model.. (context) - Cochran - 2002
1 Augmenting a Microprocessor with Reconfigurable Hardware - Hauser - 2000
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