Abstract:
This paper proposes the Implicitly-MultiThreaded (IMT) architecture to execute compiler-specified speculative threads on to a modified Simultaneous Multithreading pipeline. IMT reduces hardware complexity by relying on the compiler to select suitable thread spawning points and orchestrate inter-thread register communication. To enhance IMT’s effectiveness, this paper proposes three novel microarchitectural mechanisms: (1) resource- and dependence-based fetch policy to fetch and execute suitable instructions, (2) context multiplexing to improve utilization and map as many threads to a single context as allowed by availability of resources, and (3) early threadinvocation to hide thread start-up overhead by overlapping one thread’s invocation with other threads ’ execution. We use SPEC2K benchmarks and cycle-accurate simulation to show that an microarchitecture-optimized IMT improves performance on average by 24 % and at best by 69 % over an aggressive superscalar. We also compare IMT to two prior proposals, TME and DMT, for speculative threading on an SMT using hardware-extracted threads. Our best IMT design outperforms a comparable TME and DMT on average by 26 % and 38 % respectively. 1
Citations
|
445
|
Multiscalar Processors
– Sohi, Breach, et al.
- 1995
|
|
363
|
Complexity-Effective Superscalar Processors
– Palacharla
- 1998
|
|
273
|
Exploiting choice: Instruction fetch and issue on an implementable simultaneous multithreading processor
– Tullsen, Eggers, et al.
- 1996
|
|
153
|
Dynamic speculation and synchronization of data dependences
– Moshovos, Breach, et al.
- 1997
|
|
145
|
A Dynamic Multithreading Processor
– Akkary, Driscoll
- 1998
|
|
139
|
A Hardware Mechanism for Dynamic Reordering of Memory References
– Franklin, Sohi
- 1996
|
|
112
|
A scalable approach to thread-level speculation. InISCA
– Steffan, Colohan, et al.
- 2000
|
|
80
|
Threaded multiple path execution
– Wallace, Calder, et al.
- 1998
|
|
37
|
Task selection for a multiscalar processor
– Vijaykumar, Sohi
- 1998
|
|
31
|
Kunle Olukotun. Data speculation support for a chip multiprocessor
– Hammond, Willey
- 1998
|
|
21
|
Thread-spawning schemes for speculative multithreading
– Marcuello, Gonzalez
- 2003
|
|
17
|
Multiplex: Unifying conventional and speculative thread-level parallelism on a chip multiprocessor
– Ooi, Kim, et al.
- 2001
|
|
13
|
Skipper: a microarchitecture for exploiting control-flow independence
– Cher, Vijaykumar
- 2001
|
|
4
|
Josep Torrellas. Architectural support for scalable speculative parallelization in shared-memory systems
– Cintra, Martinez
- 2000
|
